AM623: AM623X Linux McASP problem

Hi Brian,

Currently I am out of office so responses might be delayed. 

Can you let me know if the playback works for some time on the current setup and then it stops? How are you providing the clocks (BCLK, WCLK to MCASP?

Best Regards,

Suren

Hi Suren,

I continue to modify the dts part, maybe modify or add some parameters in mcasp1/sound/...,

but there are two results:

The situation described above is that it gets stuck after playing, and I need to press Ctrl-C to force stop, but there is no FrameSync/BCLK output during this period.
The other situation is the more common result: after playing for a short period of time (about 1 second), the error message is directly printed. My judgment is that there is no CLK, so there is no DMA/interrupt so the data cannot be sent, or there is no DMA/interrupt so there is no CLK. 

I don’t know the causal relationship between the two, but the lack of CLK output can be directly observed.

The following is a screenshot of this result:

I also wrote a script to monitor the changes of clk and pm while playing. The reference command is as follows:

grep -i mcasp /sys/kernel/debug/clk/clk_summary 

cat /sys/kernel/debug/pm_genpd/pm_genpd_summary | grep -i audio

The above is a screenshot of the monitoring result (in this case, I changed PCM to 32 timeslot X 16 bits =4.096MHz)

In the current test, I hope that McASP will actively output FS/BCLK (Master Mode), which will make it easier for us to develop and test the upper layer of voice functions on EVM in advance.

Later, when we get our hardware circuit, theoretically, we should only adjust the pins used and change the operation mode to Slave (receive FS/BCLK)，This should only be an adjustment of the underlying interface.

Best Regards,

Brian

Brian Yin said:

simple-audio-card,bitclock-master = <&mcasp1>;
simple-audio-card,frame-master = <&mcasp1>;

Brian,

Can you make the change from < &mcasp1> to <&sound_master>?

Best Regards,

Suren

Hi Suren,

Thank you for your reply.

This is a point that I was confused about. After I posted this question, I realized that I misunderstood. I thought that the McASP1 was in Master Mode, but the fact is the opposite. In the EVM design, 12.288MHz is used to provide CLK to the Codec, and then the Codec provides it to the McASP1, so McASP1 working in Slave Mode. Regarding your suggestion, I guess it is for the Slave Mode design, but the dummy codec I use does not provide CLK, so I made relevant modifications for the two operating modes.

Add define MCASP_MASTER_MODE in k3-am62x-sk-common.dtsi

Change direction according to the operating mode

In k3-am625-sk.dts (I changed to sdx500p-ccb.dts)

According to the above modifications, no matter which mode I use, the execution result is the same, as follows:

root@am62xx-evm:~# aplay -D plughw:0,0 2-11111_pcm.wav -vvv
Playing WAVE '2-11111_pcm.wav' : Signed 16 bit Little Endian, Rate 8000 Hz, Mono
Plug PCM: Hardware PCM card 0 'AM62-ASP1-TS32' device 0 subdevice 0
Its setup is:
stream : PLAYBACK
access : RW_INTERLEAVED
format : S16_LE
subformat : STD
channels : 1
rate : 8000
exact rate : 8000 (8000/1)
msbits : 16
buffer_size : 4000
period_size : 1000
period_time : 125000
tstamp_mode : ENABLE
tstamp_type : MONOTONIC
period_step : 1
avail_min : 1000
period_event : 0
start_threshold : 4000
stop_threshold : 4000
silence_threshold: 0
silence_size : 0
boundary : 9007199254740992000
appl_ptr : 0
hw_ptr : 0
Max peak (1000 samples): 0x00000008 # 0%
Max peak (1000 samples): 0x000005a0 # 4%
Max peak (1000 samples): 0x000003b0 # 2%
Max peak (1000 samples): 0x00000330 # 2%
Max peak (192 samples): 0x000001e8 # 1%
aplay: pcm_write:2178: write error: Input/output error
root@am62xx-evm:~#

The only difference is the FS/BCLK signal seen on the oscilloscope:

When I set it to Slave mode, these two signals have no change at all,
But when it is set to Master Mode, it seems to try to send some signals, but it still cannot appear in the end (I have disconnected the line to avoid the influence of the codec)

Best Regards,

Brian

Hi Brian,

Can you let me know how do you want to proceed, you are wanting to use MCASP in master configuration or as slave configuration? If you are end design would provide MCASP with clocks (BCLK and Frame Sync), then I would suggest looking at our existing device tree file (k2-am62x-sk-common.dtsi) file.

But If you want to use MCASP as master, then you would have to use AUXCLK or by providing external clock on AUDIO_EXT_REFCLK pins on the SOC and using system-clock-direction-out; on the device tree.

Please see below threads for reference:

https://e2e.ti.com/support/processors-group/processors/f/791/t/1529060

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1487650/am625-running-mcasp-as-master-with-external-audio_ext_refclk-of-24-576mhz

Hope these will help.

Best Regards,

Suren

Hi Suren,

Let's focus on Master Mode first!
I choose to use AUDIO_EXT_REFCLK1 as the reference frequency, because using AUXCLK may not be able to achieve the BCLK: 4.096MHz I need.

Below is my modification
I adjusted the pin output direction and added AUDIO_EXT_REFCLK1

I found that k3-am62-amin.dtsi already has settings for audio_refclk1, I keep this block and add the setting assigned-clock-rates = <12288000>;

In this file, I also adjusted the settings of mcasp1

My audio card definition is as follows:

mcasp1 as follows:

After recompiling and loading the system to play, the following error is obtained:

There is a very strange number 12345679 here!

I guess the invalid setting of AUDIO_EXT_REFCLK1 12.288MHz will cause the aplay error. Please help me find out where the problem is?

Best Regards,

Brian

sdx500p-sdk-11.00.zip

sdx500p-sdk-11.00-20250725-final.zip

Hi Suren,

Thank you for working until midnight to help fix this problem!

Attached is the final device tree version (I added a few simple notes).

In addition to the kernel patch, the problem has not been solved yet.

Kernel patch ref: https://patchwork.kernel.org/project/alsa-devel/patch/5652E348.8080002@invoxia.com/

Here is a screenshot of the execution result:

clk_summary:

About AUDIO_EXT_REFCLK1 use D20 pin as follow:

We double check this pin is OK.

Please let me know if you need any more information from me.

Best Regards,

Brian

Hi Brian,

Let me review your DTS and come back to you.

Best Regards,

Suren

Hi Suren,

How is this progressing?
Please keep me updated if you find anything new.

Best Regards,

Brian

Hi Brian,

Can I schedule a call on Monday to go over some DTS changes and try experimenting on your setup?

Best Regards,

Suren

Hi Suren,

Yes.
Is it similar to the last meeting time?
Monday at 9 or 10 PM (Tuesday at 10 or 11 AM Taiwan time) Okay ?

Best Regards,

Brian

Hi Brian,

Can you remove the "system-clock-direction-out;" from the device tree and share your observations with the current DTS changes you have.

Best Regards,

Suren

Hi Suren,

Whether using D20 or K35, I removed the string as you suggested and the test results are still the same, as shown below:

The following is the waveform displayed for pin D20, with a frequency close to 12.288MHz.

evm-tdm-master.zip

Attached is the test file (using the D20).

Best Regards,

Brian

Brian,

Can you overwrite the audio_refclk1 {} node to use a fixed-clock and point that in sound master node.

Best Regards,

Suren

Hi Suren,

The following is the previous modification, which is exactly what you described.

I have rewritten audio_refclk1 block using fixed-clock and point that in sound_master node.

This did not resolve the issue.

We are currently working on various interface issues with the new hardware circuit board.

If you have any other suggested modifications, please provide them to us and we will verify them.

During this period, we will also be testing Slave Mode solutions.

If Master Mode still fails , we will modify the hardware to switch to Slave Mode.

Best Regards,

Brian