Part Number: TMS320C6678
Background:
We are working on configuring the SRIO LSU registers using EDMA to initiate SRIO transmissions. As a first step, we attempted to use EDMA to transfer data between two buffers within L2 memory. We based our implementation on the example "edma_ping_pong_xfer_gbl_region" found in edma_test.c in pdk_c667x_2_0_16.
Issue:
However, this example seems not to work in our context, as the data verification fails. The data seems not to reach its destination, even though an interrupt transfer completion code has been detected by the EDMA (At least the interrupt pending bits associated with a TCC are set).
Questions:
We have got the following question:
- Are there any known issues with this example (edma_ping_pong_xfer_gbl_region)?
- Does a detected TCC always guarantee a successful transmission
- Is there any reason for the existence of different CSL Versions (V0 with prefix CSL_edma3 , V1 with prefix EDMA3... )
