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I have an 8168 booting from NOR flash. I'm trying to setup PCIe communication by essentially replicating what the ROM code does in Linux. I boot up the 8168 to Linux, insert a module that enables the PCIe 250MHz clock and change the PLL configuration from PCIE_CFG, then I run the following commands to setup the PCIe configuration:
# BAR1 -> region 0
./dumpmem 0x51000300 w 0x01
./dumpmem 0x51000304 w 0x80800000
./dumpmem 0x51000308 w 0x00000000
./dumpmem 0x5100030C w 0x40400000
# BAR2 -> region 1
./dumpmem 0x51000310 w 0x02
./dumpmem 0x51000314 w 0x81000000
./dumpmem 0x51000318 w 0x00000000
./dumpmem 0x5100031C w 0x08000000
# BAR3 -> region 2
./dumpmem 0x51000320 w 0x03
./dumpmem 0x51000324 w 0x81800000
./dumpmem 0x51000328 w 0x00000000
./dumpmem 0x5100032C w 0x80000000
# BAR4 -> region 3
./dumpmem 0x51000330 w 0x04
./dumpmem 0x51000334 w 0x82000000
./dumpmem 0x51000338 w 0x00000000
./dumpmem 0x5100033C w 0xC0000000
# Lane x1 only
# PL_LINK_CTRL
./dumpmem 0x51001710 w 0x10120
./dumpmem 0x5100180C w 0x20F
# Set Vendor ID
./dumpmem 0x51001000 w 0xB800104C
# CLASSCODE_REVID
./dumpmem 0x51001008 w 0x401
#MSI_CAP
./dumpmem 0x51001050 w 0x817005
#PCIe CAP
./dumpmem 0x51001070 w 0x020010
I then enable link training using:
./dumpmem 0x51000004 w 0x07
At this point, I'm still able to dump the DEBUG0 and DEBUG1 registers using:
./dumpmem 0x51001728
I turn on the PC and the device fails to enumerate. I'm also unable to read 0x51001728:
# ./dumpmem 0x51001728
/dev/mem opened.Unhandled fault: external abort on non-linefetch (0x1018) at 0x40127728
Memory mapped at address 0x40127000.
Bus error
Are there any configuration registers that I might be missing? Also, I'm not able to see the status of the link training state machine. Any advice for debugging?