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Hello,
I use the CCS V5 to check my hardware for the following configuration:
- OMAP_l138 => DSP/ARM 300Mhz:mDDR/DDR2 150Mhz
- DDR2 -667D => 16-bit DDR2 with up to 512-MB memory address space (64Mb X16 X8 Banks )
-FLASH NOR SPI
-NAND FLASH
DDR2 Configuration Register Parameter:
-SDCFG => 0x0893C632
-SDRFC => 0X00000249
-SDTIM1 => 0x26923209
-SDTIM2 => 0X7C14C722
I currently checking the access in write/read mode into DDR2 memory and everything is all right, but I can’t see any state changes of the chip select (CS) DDR2 when it’s not write/ read , the chip select (CS) is always low.
Is these operating mode seems to be normal ?
Adress and data bus DDR2 test passed .
Thank you pour response