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Documentation error c5504/05/14/15 UART user's guide sprufo5.pdf

John Fisher
Expert 1030 points

In section 2.8 initialization, step 3, "Enable the UART input clock by setting UARTCG to 1 in the peripheral clock gating configuration
register (PCGCR1)."

I think that should be set UARTCG to 0, since 1 means disabled according to the system user's guide. Also initialization procedures in documents for other peripherals set to 0. Am I correct?

  • 0
    Expert 1030 points

    Further the system user's guide says "After the boot process is complete, the external bus selection register must be modified only once", not sure what is meant by boot process complete, but I'm taking it to mean the EBSR should only be written once after reset, so therefore it shouldn't be modified as part of any particular peripheral initialization procedure (step 1 here), but once only at a system level. Other peripheral documents make what I think is this same mistake.

    step 2 is also incorrect (should write 1 to UART_RST, not 0)

     

  • 0
    TI__Mastermind 23785 points

    Yes. You are correct. We will update it.

    Regards.

  • 0 in reply to John Fisher
    TI__Mastermind 23785 points

    Boot process refers to bootloader in the ROM. Thus, yes, EBSR should only be written once after reset.

    Actually writing a 0 to UART_RST has no effect. But writing a 1 to UART_RST will force a hardware reset. Should not write 1.

    Regards.

  • 0 in reply to Steve Tsang
    Expert 1030 points

    Steve Tsang said:

    Actually writing a 0 to UART_RST has no effect. But writing a 1 to UART_RST will force a hardware reset. Should not write 1.

    Regards.

    So step 2 should read "Ensure the UART is out of reset by waiting until UART_RST = 0 in the peripheral reset control register
    (PRCR)."

    Is that correct?

  • 0 in reply to John Fisher
    TI__Mastermind 23785 points

    Yes. Thanks. Will update documents.

    Regards.