PCIe transaction between two DSP c6678 through AMC backplane

hello,

I have two TMS320c6678le boards, my goal is to make PCIe transaction between these two boards through AMC backplane, and to test time from send data to received data on the RC side.

I used the sample provided by TI (PCIes_sample), then succeed in communication.

So I tried to get the free run timer counts by accessing TSCL before RC sends data to EP and after RC receives data from EP.

The I get the difference between two counts.

It costs about 30ms to complete the communication between two boards.

it cost so much time so that I doubt if it is possible.

Do I need to change some settings in code ? or configurations on boards?

I have no idea where the latency comes from?

Sincerely

added:

---------time test code--------

... ...

 System_printf ("Link is up.\n");

 if(PcieModeGbl == pcie_RC_MODE)　/* RC send data */

 {

   /**********************************************************************/

   /* Push a single message to the EP then verify that it is echoed back */

   /**********************************************************************/

   /* Write from RC to EP                                                */

   if ((retVal = Pcie_getMemSpaceRange (handle, &pcieBase, NULL)) != pcie_RET_OK) {

     System_printf ("getMemSpaceRange failed\n", (int)retVal);

     exit(1);

   }

   for (i=0; i<PCIE_BUFSIZE_APP; i++)

   {

     *((volatile uint32_t *)pcieBase + i) = srcBuf[i];

   }

   prevCnt =  TSCL;   ←←←←←←←←←←←←←←←←←←←←←←←←←←←read counts

   /* Mark that the buffer is full, so EP can process it */

   *((volatile uint32_t *)pcieBase + PCIE_BUFSIZE_APP) = PCIE_EXAMPLE_BUF_FULL;

   /* Note on cache coherence: Write back is not necessary because pcieBase is in

      peripheral address space instead of physical memory*/

   /* Data sent to EP.

      RC waits for the loopback to be completed and

      receive data back from EP */

   do {prevCnt2++;

     unsigned int key;

     /* Disable Interrupts */

     key = _disable_interrupts();

     /*  Cleanup the prefetch buffer also. */

     CSL_XMC_invalidatePrefetchBuffer();  

     CACHE_invL1d ((void *)dstBuf.buf,  PCIE_EXAMPLE_DSTBUF_BYTES, CACHE_FENCE_WAIT);

     CACHE_invL2  ((void *)dstBuf.buf,  PCIE_EXAMPLE_DSTBUF_BYTES, CACHE_FENCE_WAIT);

     /* Reenable Interrupts. */

     _restore_interrupts(key);

   } while(dstBuf.buf[PCIE_BUFSIZE_APP] != PCIE_EXAMPLE_BUF_FULL);

   prevCnt1 =  TSCL;　　　　　　←←←←←←←←←←←←←←←←←←←←←←←←←←←read counts

   Cnt = prevCnt1 - prevCnt;　 ←←←←←←←←←←←←←←←←←←←←←←←←←←←get difference of the two counts

   /* check all the data */

   for (i=0; i<PCIE_BUFSIZE_APP; i++)

   {

     if(dstBuf.buf[i] != srcBuf[i])

     {

       System_printf ("Received data = %d\nTransmited data = %d\nIndex = %d.\n\nTest failed.\n",

                       dstBuf.buf[i], srcBuf[i], i);

       exit(1);

     }

   }

   System_printf ("Root Complex received data.\nTest passed.\n");

 }

 else

 {　　/* EP receive data */

　｝

---------results-------------

 Cnt = 2931335

 prevCnt = 253694

 prevCnt1= 3185029