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Errors met when putting L138 DSP into sleep

Hi,

We follow the steps detailed in 10.7.4 C674x Megamodule Clock ON/OFF of SPRUH77 and tries to implement DSP sleep function without using BIOS or Linux PSP. The expectation is that ARM repeatedly put DSP into sleep first, waits for 5 seconds, then wakes it up, and repeats this cycle. The interrupt to wake DSP core is CHIPINT2 commonly used for IPC communication.
  
The codes responsible for the scenario on both cores are below:
code on both cores said:
ARM code:
#define DSP_ON 1
#define DSP_OFF 2
int PSC_DSP_action = DSP_OFF;
///*
while(1)
{
       /*delay for 5ms; if the off-on operations both succeeded, we are expecting to
         see current down-up cycles of which each phase is 5 seconds' long*/
       USTIMER_delay(5000000);
 
       PSC_DSP_action = (PSC_DSP_action==DSP_OFF)?DSP_ON:DSP_OFF;
       if (PSC_DSP_action==DSP_OFF)
       {
              //next state
              HWREG(0x01c10a3c/*PSC0.MDCTL15*/)= (HWREG(0x01c10a3c) & (~0x07/*0x3f*/)) | 0x02;
              //cause PSC to evaluate next state
              HWREG(0x01c10120/*PSC0.PTCMD*/)= (HWREG(0x01c10120) & (~0x03)) | 0x02;
 
              //PSC0_PTSTAT: poll for transition's completion
              while((HWREG(0x01c10128/*PSC0.PTSTAT*/) & 0x00000002)!=0/*0x00000002*/);
              //check module status
              while((HWREG(0x01c1083c/*PSC0.MDSTAT15*/) & 0x0000001f)!=0x00000002);
       }
       else if (PSC_DSP_action==DSP_ON)
       {
              HWREG(0x01c10a3c)= (HWREG(0x01c10a3c) & (~0x07/*0x3f*/)) | 0x03;
              HWREG(0x01c10120)= (HWREG(0x01c10120) & (~0x03)) | 0x02;
              while((HWREG(0x01c10128) & 0x00000002)!=0/*0x00000002*/);
              while((HWREG(0x01c1083c) & 0x0000001f)!=0x00000003);
 
              /*CHIPINT2 interrupt to wake DSP up*/
              HWREG(/*0x01c14174*/SOC_SYSCFG_0_REGS + SYSCFG0_CHIPSIG) = 0x00000004;
       }
}
DSP code:
void main(void) {
IntReset(); //?
IntDSPINTCInit()
IntRegister(6,wake_DSP_IPC);
IntEventMap(6,SYS_INT_SYSCFG_CHIPINT2);
IntRegister(7,PDC_int);
IntEventMap(7,SYS_INT_PDC_INT);
IntEnable(7);
IntEnable(6);
IntGlobalEnable();  
while(1);
}
void PDC_int()
{
       static int i=0;
       printf("DSP sleep # %d\n\n",i++);//display a message at each sleep
 
#define PDCCMD (0x01810000)
       IntEventClear(SYS_INT_PDC_INT);
       IntGlobalEnable();//set DSP core GIE to enable wake up interrupt
       HWREG(PDCCMD)=0x00015555;
       asm("  IDLE");
}
 
void wake_DSP_IPC()
{
       static int i=0;
       printf("DSP wake-up # %d\n\n",i++);//display a message at each waking-up
 
       HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_CHIPSIG_CLR) |= (0x00000004);
       IntEventClear(SYS_INT_SYSCFG_CHIPINT2);
}
The running result has not been really successful. Three conditions would occur:

1.     DSP core halts with C$$EXIT message (screenshot).

2.     DSP core doesn’t halt, but cannot cycle through on-off cycles. The printf() messages at sleep and wake-up interrupt only show up once for each.

3.     SD emulator lost connection to both cores, although we only put DSP into sleep (screenshot).

  
 
  
Following wiki article http://processors.wiki.ti.com/index.php/How_to_connect_to_the_OMAP-L138/C6748/AM1808_EVM_board_using_CCS%3F we already set the JTAG frequency to legacy 10.368MHz. Don’t know why DSP’s sleep could still cause ARM core to lose connection.
 
  
Could someone advise us the proper ways to put DSP into sleep and wake it up?
  
  
John