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320C6678 DDR3: How do I verify Incremental Leveling is operating?

Hi,

On TMDXEVM6678L it appears I have DDR3 working with partial automatic leveling.

I believe it more reliable to add Incremental Leveling, so I added 3 lines of code from SPRABL2 Example 20.
     RDWR_LVL_RMP_WIN = 0x00000502;
     RDWR_LVL_RMP_CTRL = 0x80000300;
     RDWR_LVL_CTRL = 0xFF000900;

How can I verify Incremental Leveling is operating?

I read the RD_DQS_SLAVE_RATIO field in DDR3_CONFIG_REG_23, but it’s not changing from the initial value.  Should it?  Is there another way I should verify Incremental Leveling?

Greg Reuter

  • Greg,

    The ratios at which the incremental levelings converge are not reflected back in the slave ratio fields. There is no way, as such, to read any register status to ensure incremental leveling is working (other than the ones you have mentioned in your post of course).

  • One more quick observation, the write incremental leveling feature is JEDEC non-compliant so we recommend at this time that it be disabled (please see "Advisory 26 DDR3 Incremental Leveling issue" in the errata document).