Could you tell me the C667x EMIF16 asynchronous memory timing requirements for the EMIF16 boot mode?
In the EMIF16 boot mode, do the registers related to timing keep those reset value?
Best regards,
Daisuke
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Could you tell me the C667x EMIF16 asynchronous memory timing requirements for the EMIF16 boot mode?
In the EMIF16 boot mode, do the registers related to timing keep those reset value?
Best regards,
Daisuke
Hi Daiske,
Yes, the registers use the reset values and operate the EMIF interface at the slowest possible rate. See the following post.
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/289314.aspx
Regards, Bill
Hi Bill,
Thank you for your reply.
The post that you show is this post. Is not there a mistake in the address?
Best regards,
Daisuke
Hi,
Yeah, the link Bill posted is this post.
Maybe he was referring to this one:
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/131612.aspx
Regards
J.
Opps. Guess I didn't have enough coffee yesterday. Here's the link I meant to include.
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/216989/767757.aspx#767757
Regards, Bill