Data line connection for the DDR3 with AM335x

VIKAS BOBADE

Other Parts Discussed in Thread: AM3354

The connection of DDR3 memory “MT41J-128M16-JT-125-IT-M” with the AM335x processor for data signals as below in two development board:

In the starter kit connection are not one to one and as per the attached picture file.

In the beagle bone black board this connection are one to one.

I believe this is the difference for easy signal track routing, then for which I have to go for and if I required any deviation within the group then what are the precautions are required in HW & SW definitions.

Regards,

Vikas

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi Vikas,

The bits may be swapped within their byte lane to facilitate routing. The two byte lanes may also be swapped, but always together with the corresponding DQM, DQS and DQSn signals. Swapping bits to different byte lanes is forbidden.

0 Biser Gatchev-XID over 11 years ago in reply to Biser Gatchev-XID

TI__Guru**** 393215 points

Of course this only applies for the data lanes. Address and control signals cannot be swapped.

0 VIKAS BOBADE over 11 years ago in reply to Biser Gatchev-XID

Prodigy 230 points

That is ok.

Now for the HW routing, can I map any data line of processor to any data line of memory within the byte group?

And what are the requiremet for this in SW definitions if there is any?

Is there any reference document that you can refer for the same?

Regards,

Vikas

0 Biser Gatchev-XID over 11 years ago in reply to VIKAS BOBADE

TI__Guru**** 393215 points

Yes, you can. No software changes are required.

0 VIKAS BOBADE over 11 years ago in reply to Biser Gatchev-XID

Prodigy 230 points

Is there any reference document that you can refer for the same? Either from Micron or TI or any other.

Regards,

Vikas

0 Biser Gatchev-XID over 11 years ago in reply to VIKAS BOBADE

TI__Guru**** 393215 points

You should follow the DDR3 and DDR3L Routing Guidelines (section 5.6.2.3 of the AM335X Datasheet, Rev. F).

0 VIKAS BOBADE over 11 years ago in reply to Biser Gatchev-XID

Prodigy 230 points

Sorry, here I am asking for the documents which mention about the signal swapping for the data bytes which we are discussing about.

Regards,

Vikas

0 Biser Gatchev-XID over 11 years ago in reply to VIKAS BOBADE

TI__Guru**** 393215 points

There are no such documents, but don't worry, you can do it. This has been confirmed by the factory team.

0 Santosh Bongane1 over 10 years ago in reply to Biser Gatchev-XID

Intellectual 375 points

For AM3354ZCZ 600Mhz or 1Ghz processor , what are selection criteria for the DDR3 SDRAM,

How i can select the suitable memory to AM3354 / 8 processor ZCZ100.

What is Clock speed and Data Rate , How i can select suitable one?

DDR3-800 means its Clock rate is 400MHz? then what to be select in DDR3 SDRAM searching

0 Biser Gatchev-XID over 10 years ago in reply to Santosh Bongane1

TI__Guru**** 393215 points

Check Table 7-58 in the AM335X Datasheet Rev. G.

0 JVS Electronics Pvt Ltd-India over 9 years ago in reply to Biser Gatchev-XID

Intellectual 490 points

Dear Sir,

Can you specify in which file we need to mention the pin swapped (or interchanged) details ?

Cheers

Chandra

0 Biser Gatchev-XID over 9 years ago in reply to JVS Electronics Pvt Ltd-India

TI__Guru**** 393215 points

What do you mean, in which file? If you mean in software, there is no need to change anything. Bit swapping within the data byte is completely transparent to software.

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Data line connection for the DDR3 with AM335x