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Previously working TMS320C6720 SDRAM Interface broken with latest board build

Other Parts Discussed in Thread: TMS320C6720
We have a design we have used on a lot of products consisting of a TMS320C6720 + Micron MT48LC4M16 SDRAM, Altera Cyclone CPLD and a FLASH chip sitting on a bus.  Nothing else is on the bus.  The last build of one of the products was DOA from the CM (untested by them) with all 10-of-10 boards unable to talk to the SDRAM. 
 
We normally boot from the I2C to bring up the board and download the FLASH image via a serial port in the Altera device in production.  The I2C EEPROM is then removed from the board and users boot from the image stored in FLASH.
 
The last build was unable to boot from the I2C port.  To see what was going on, we attempted to connect the board to our XDS510USBPlus.  We are able to connect, but the emulator reports a memory error when we try to download code to the target via the emulator.  The exact same process was followed on a board from the previous build and it worked fine.  I buzzed out the board and verified there are no shorts or opens on the bus circuitry.
 
I suspect there is a problem with the TMS320's interface to the SDRAM.  Are you aware of any issues with these parts?  The CM claims they purchased the parts from Mouser.  In addition to the part number, the parts are marked "C12-06A1ETG4".  The board that works has a TMS320 marked "C12-23D671TG4".  Are there any differences between these parts?
 
 
  • Reformatting previous post:

    We have a design we have used on a lot of products consisting of a TMS320C6720 + 
    Micron MT48LC4M16 SDRAM, Altera Cyclone CPLD and a FLASH chip sitting on a bus. 
    Nothing else is on the bus.  The last build of one of the products was DOA from the CM
    (untested by them) with all 10-of-10 boards unable to talk to the SDRAM.
     
    We normally boot from the I2C to bring up the board and download the FLASH
    image via a serial port in the Altera device in production.  The I2C EEPROM is then
    removed from the board and users boot from the image stored in FLASH.
     
    The last build was unable to boot from the I2C port.  To see what was going on, we 
    attempted to connect the board to our XDS510USBPlus.  We are able to connect,
    but the emulator reports a memory error when we try to download code to the target
    via the emulator.  The exact same process was followed on a board from the previous
    build and it worked fine.  I buzzed out the board and verified there are no shorts or
    opens on the bus circuitry.
     
    I suspect there is a problem with the TMS320's interface to the SDRAM.  Are you aware 
    of any issues with these parts?  The CM claims they purchased the parts from Mouser. 
    In addition to the part number, the parts are marked "C12-06A1ETG4".  The board that
    works has a TMS320 marked "C12-23D671TG4".  Are there any differences between
    these parts?
     
     
  • Hi Tom,

    Thanks for your post.

    In my opinion, this could be SDRAM not reset & re-initialized properly. May be, you could work out on SDRAM control registers and evaluate the status since the device will have access to SDRAM control registers. Probably, if you explore more details on the memory error when you try to dowload the code to the target via the emulator and could you please provide us the memory logs, so that, we could check what exactly the problem is?

    I don't think, it could be any hardware issue or like, there could be less chance that the SDRAM interface to TMS320c6720 device would have been broken? I guess, SDRAM would have not reset properly to its default state and thereafter, it could re-initialize the register memories after taken out of reset, so, might be, it could be SDRAM registers would have corrupted with your previous build.

    Kindly refer the SDRAM interface C672x EMIF user guide as below in which, please see sections 2.4.4 & 2.4.5 for SDRAM configuration procedure if power-up constraint was not violated and SDRAM initialization sequence.

    http://www.ti.com/lit/ug/spru711c/spru711c.pdf

    Thanks & regards,

    Sivaraj K

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  • We found the problem.  It turned out the CLKIN frequency, which should have been 25 MHz, was actually 66 MHz due to an error at the CM.  The weird thing about this was that everything else worked on the board except for the SDRAM.  Even the PLLs on the TMS320 chip....  Must have a lot of design margin....

  • Hi Tom,

    Thanks for your update and it was a very good catch.

    It is highly appreciated.

    Thanks & regards,
    Sivaraj

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