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C6748 EMIFA Questions

Other Parts Discussed in Thread: TMS320C6748

I got these today and wanted them to be answered in the forum.

1) I couldn't find much information about "EMA_A_RW" pin D10.

 

The only info I found was on TMS320C6748 datasheets. In one of the tables pin functionality was described as "EMIFA Async Read / Write control".

User's Guide "TMS320C674x/OMAP-L1x Processor External Memory Interface A (EMIFA)" doesn't mention the pin at all. In suggested applications read and write commands are controlled with a help of "EMA_OE" (pin B15) and "EMA_WE" (pin B9) pins respectively.

 

2) I couldn't find much info about "EMA_WAIT[0]" (pin B18) and "EMA_WAIT[1]" (pin B19). I know that "wait" input is used to allow "

...extension of the strobe period of an access cycle ..." if it is needed, but I don't know the difference between the two inputs. Which one should I use?

 

In my application I interface "EMIF A" to M29W640FT NOR FLASH, NAND02GW NAND FLASH and two XR16M2752 DUARTs.

 

Could you please point me to some documentation?

 

3) Could you please help me with meaning of some pins of TMS320C6748?

 

I couldn't find much information about following pins:

 

EMA_WEN_DQM(0)          (pin C8)

EMA_WEN_DQM(1)          (pin A5)

 

DDR_DQGATE0                (pin R11)

DDR_DQGATE1                (pin R12)

 

I read "EMIFA User's Guide" and "DDR2/mDDR Memory Controller User's Guide"

among others on TI web site but couldn't find enough info.

 

  • The forums are a great place to find information on questions like these.  A couple of minutes searching the forum pointed me to the following post which covers pretty much the same questions you have!

    https://e2e.ti.com/support/dsp/tms320c6000_floating-point_dsps/int-freon/f/117/p/41107/143266.aspx#143266

  • I just realized that the link I provided pointed to an internal forum, not visible to people outside TI.

    1) I couldn't find much information about "EMA_A_RW" pin D10.

    The only info I found was on TMS320C6748 datasheets. In one of the tables pin functionality was described as "EMIFA Async Read / Write control".

    User's Guide "TMS320C674x/OMAP-L1x Processor External Memory Interface A (EMIFA)" doesn't mention the pin at all. In suggested applications read and write commands are controlled with a help of "EMA_OE" (pin B15) and "EMA_WE" (pin B9) pins respectively.

    This issue will be addressed in an upcoming revision of the EMIFA user guide.  The R/W pin stays high during reads and low during writes (same duration as the CS pin).

    2) I couldn't find much info about "EMA_WAIT[0]" (pin B18) and "EMA_WAIT[1]" (pin B19). I know that "wait" input is used to allow "

    ...extension of the strobe period of an access cycle ..." if it is needed, but I don't know the difference between the two inputs. Which one should I use?

     

    In my application I interface "EMIF A" to M29W640FT NOR FLASH, NAND02GW NAND FLASH and two XR16M2752 DUARTs.

     

    Could you please point me to some documentation?

    Multiple wait pins are support for flexibility.  You can connect each to a different device.  Or you leave both of them unconnected and disable the wait functionality of the EMIF.  You can also specify which wait pin applies to each chip select space through software.

    3) Could you please help me with meaning of some pins of TMS320C6748?

    I couldn't find much information about following pins:


    EMA_WEN_DQM(0)          (pin C8)
    EMA_WEN_DQM(1)          (pin A5)

    DDR_DQGATE0                (pin R11)
    DDR_DQGATE1                (pin R12)


    I read "EMIFA User's Guide" and "DDR2/mDDR Memory Controller User's Guide" among others on TI web site but couldn't find enough info.

    The DQM pins of the EMIFA are used as byte enable pins in 16- and 32-bit mode, both for async and sync memory.

    The DQGATE pins of the DDR EMIF are used to account for board delays.  They have specific routing requirements.  See the device data sheet for more information.