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OMAPL13x EDMA to handle ADC samples via SPI bus

Other Parts Discussed in Thread: OMAPL138

Hi everyone,

 

We have the following application: OMAP L132 reading ADC samples via SPI.

The ADC produces a single data ready (DRDY) interrupt and then the C6748 core starts to read 8x16bit words via SPI.

We are interested in changing this low level driver, which takes a lot of CPU time, to an EDMA application.

Is it possible to perform such transfer using EDMA? We couldn't find anythng suitable on the TRM.

Thank you in advance.

Yeho.

 

  • Hi,

    Yes, you could perform such transfers using EDMA driven instead of CPU driven data transfer.

    Programing Sequence for DMA Mode, please refer the below wiki page.

    http://processors.wiki.ti.com/index.php/StarterWare_SPI

    http://processors.wiki.ti.com/index.php/StarterWare_01.10.01.01_User_Guide

    May be, you could start with starterware SPI-EDMA example which would be a better benchmark and you could see the project and source file paths from the below after starterware installation:

    Project path:

    ~\OMAPL138_StarterWare_1_10_04_01\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\spi_edma

    Source path:

    ~\OMAPL138_StarterWare_1_10_04_01\examples\lcdkOMAPL138\spi_edma

    Also, there are examples for C674x which are based on DSP/BIOS drivers: PSP (platform support package).

    Getting started with C6748 DSP on the OMAPL138 is described here:

    http://processors.wiki.ti.com/index.php/Getting_Started_Guide_for_C6748

    If you are looking for register CSL kind of examples, you can find that under pspdrivers_xx_xx_xx\packages\ti\pspiom\cslr\evm6748\examples.

    There is a SPI example in the PSP package which configures the peripheral in master mode.

    Also, please refer the below E2E posts for servicing SPI using EDMA:

    http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/213724.aspx

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/30083.aspx

    Thanks & regards,

    Sivaraj K

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  • Hi Sivaraj,

    Thank you for your quick response.

    I've already went through the guides and examples you've posted, but still have something that I don't grasp:
    Our application has only 1 DRDY trigger after which 8 words must be read - but not at once:
    The 8 words must be read separately: a single word must be written to the SPI TX buffer, then
    we wait for the SPI_RXBUF_FULL event. so far everything is OK.
    But if we only have 2 EDMA channels - one triggered by the SPI_TXBUF_EMPTY and one triggered by SPI_RXBUF_FULL,
    then these EDMA transactions will be triggered endlessly (once the TXBUF is empty - a new word will be sent, and once the RXBUF is full a new word will be read from it) because even after 8 words were read, any new word on TXBUF will trigger an SPI transmission of dummy zeros but the SPI_RXBUF_FULL event will still be triggered.

    I still don't understand how to end this loop.

    Edit: It seems that this type of application requires a strong CPU intervention in the process - once a word was read from SPIBUF, a completion interrupt must signal the CPU, and the CPU must hold an internal counter to decide whether 8 words have already read or not, and then to break the loop by disabling these EDMA channels until another DRDY signal comes in. Am I right here?

    Thanks again,

    Yehonadav.