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AM5726: Mirrored DDR3 placement with ECC

Part Number: AM5726

Hi.  I would like to use ECC on the AM5726 Sitara MPU.  I am aware of the silicon eratta i922 but would still like to have the ECC memory option available.  I want to maximize the memory space to 4GB (the part maximum) hence currently I'm using 2 Micron MT41K1G8SN-125IT (DDR3L-1600, 1Gbit × 8-bit parts) per EMIF to give a total of 2GBytes per EMIF (1GB × 2 Devices = 2GBytes × 2 EMIFs = 4GBytes total.  I understand that I may add a 5th DDR3L SDRAM device on the EMIF1 ECC pins as long as I'm aware of the 16-bit quanta restriction and that the ARM and/or DSP are the initiators into the ECC memory partition (a subset of the EMIF1 memory space).

The E2E Sitara_arm/f/791/t/565429 post was very helpful to ensure I've got the above information correct.

That said, If I've got all of the above correct, then here's my questions:

Per the latest AM572x datasheet (SPRS953B) §8.2.2.3, Table 8-3, I am wondering if PCB mirroring is supported if I use the ECC memory.  The table states that if I have 5 × 8-bit DDR3 devices on one EMIF bus then mirroring is not supported.  However, my EMIF1 bus width.is × 16-bit (2 devices) because I'm using 2 DDR3L devices plus one ECC memory.

1) So may I use PCB device mirroring with this ECC arrangement?

2) Does this DDR3L device count in the datasheet table 8-3 include the ECC memory?

Thanks,

Charles