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Tool/software: Code Composer Studio
I used the SYSBOOT pins as GPIOs after initialization. For instance the SYSBOOT[4:0] is set to 0x11001 by external pull up/down. They are configured as GPIOs after initialization and connected to FPGA.
During test I set the GPIO's output value on processor and monitor the pins' value inside FPGA. For the pulled-up pins, I can drive them high/low successfully. But for the pulled-down pins, I cannot get a high value in FPGA even I set the GPIO output high on processor side. On my board, the pull-up register is 100K, while the pull-down register is 10K.
Does the external pull-down register have an impact on the GPIO's value? What is a proper external pull-down register value for these pins?
Thanks,
Wenyong
I tried all pullup/pulldown combiniations before, including enable/disable internal pulls, set internal pullup/pulldown. It doesn't work. That's why I suspect if the external pull-down is too strong.