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Linux/TLV320AIC3XSW-LINUX: TLV320AIC as a master or as a slave

Part Number: TLV320AIC3XSW-LINUX
Other Parts Discussed in Thread: TLV320AIC3106

Tool/software: Linux

Hi Everyone..

We are using tlv320aic3x codec in our project and it is playing well.

I have a confusion regarding the configuration of codec..i.e whether it is acting as a master or a slave.

My device tree is :

&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 2 0 0 /* Changing from 0 0 1 0 to 1 2 0 0 */

>;

tx-num-evt = <32>;
rx-num-evt = <32>;
};

mcasp0_pins: mcasp0_pins {

pinctrl-single,pins = <

AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE6) /* mcasp0_aclkx*/
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE6) /* mcasp0_fsx*/
AM33XX_IOPAD(0x868, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* mcasp0_axr0*/
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE6) /* mcasp0_axr1 */
>;
};

sound {
compatible = "simple-audio-card";
simple-audio-card,name = "TI BeagleBone Black";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,bitclock-inversion;

simple-audio-card,cpu {
sound-dai = <&mcasp0>;
};

sound_master:simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
system-clock-frequency = <24000000>;
};

};

As it is written above..bitclock and frame master is the codec..but in the pin muxing we are using ACLKX and FSX which are for Transmit. 

Also we are using dma_event_intr0 .clkout1 for generating the master clock. As the processor is generating the master clock..it should be the master. But in device tree it is shown that the codec is the master.

Can anyone please explain me this that who is the master? and who is generating the bit and word clock
My codec is working fine. I am able to play from the custom board.

Thanks 
Deep

  • Can anyone explain my query?

    Thanks

  • Deep,

    The one (codec or McASP) that drives the bit clock and frame sync is the master. In your case AIC3106 codec is the master.

    deep ter said:
    AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE6) /* mcasp0_aclkx*/
    AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE6) /* mcasp0_fsx*/

    deep ter said:
    As it is written above..bitclock and frame master is the codec..but in the pin muxing we are using ACLKX and FSX which are for Transmit. 

    pin input is for receive, McAPS receive ACLKX/bclk and FSX/fs from codec on these input pins

    deep ter said:
    Also we are using dma_event_intr0 .clkout1 for generating the master clock. As the processor is generating the master clock..it should be the master. But in device tree it is shown that the codec is the master.

    It doesn't matter who generate the MCLK regarding master/slave definition. The important signals are only BCLK and FS for master/slave definition.

    See the below pointers for more info:

    Regards,
    Pavel

  • Thanks Pavel,

    I have posted a query regarding a codec whose driver I am writing.

    e2e.ti.com/.../607500

    I need bclk=1.411MHz lrclk=44.1 KHz

    I am using ACLKX , FSX and AXR0 pins .I need that the clock should be generated from MCASP. Can you please tell me what changes has to be done if any in McASP Driver.

    Thanks in Advance
    Deep
  • I replied in the other e2e thread.

    Regards,
    Pavel