TMS320C6678: question about the iblPCIeWorkaround( ) function

Snaku Lee26

Part Number: TMS320C6678
Other Parts Discussed in Thread: CDCE62005

Hi,

I have a question about the iblPCIeWorkaround( ) function in the IBL code. The IBL version is 1.0.0.16, and the silicon version of the C6678 is 2.0.

I am using TFTP boot mode, and I trying to initialize PCIe before C6678 start the TFTP download the application code.

So I try to use iblPCIeWorkaround( ) function, I change the VID, PID setting, and I remove the line 'waitForBoot(MAGIC_ADDR)' in the bottom of it. When my board plug in a PCIe slot, it works fine, but if my board didn't plug in PCIe slot, the CPU will hang at hwEmif4p0Enable( ).

I read this post, Eric said: "PC host uses spread spectrum clock, you have to source this clock to C6678. You can refer to IBL PCIE workaround code iblPCIeWorkaround()". Does it mean C6678's clock source changed to PC host? How to do it correctly?

Thank you,

Snaku

over 6 years ago

0 Cvetolin Shulev-XID over 6 years ago

TI__Guru 65405 points

Hi Snaku,

Our team will need some time to gather data in the lab. Please allow us a few days and we will get back to you.

BR
Tsvetolin Shulev

0 lding over 6 years ago in reply to Cvetolin Shulev-XID

TI__Guru* 95265 points

Hi,

When using PCIE with a host PC, it is suggested to source the PC's PCIE reference clock to C6678 for enumeration.

Not sure if you used TI 6678 EVM + AMC PCIE adpator or not in your test. If it is, there is code in our IBL to control the clock selection from FPGA:

/* Write ICS 557 Clock Selection Control Register in the FPGA */
/* 1 : FPGA_ICS557_SEL s driven high */
DEVICE_REG32_W(DEVICE_SPI_BASE(0) + SPI_REG_SPIDAT0,
FPGA_WRITE_REG_CMD(FPGA_ICS557_SEL_CTRL_REG,1));

Regards, Eric

0 Snaku Lee26 over 6 years ago in reply to lding

Intellectual 310 points

No, I am not use TI 6678 EVM, so I remove these code in my board. There is a PCIe switch (i.e. PEX8616) on my board, which like DSP_8681.

In the iblPCIeWorkaround( ) function, is any code should be comment out if my board doesn't plug in PCIe slot?
if yes, how do i detect the PCIe is work with PC host or not?

I just want the C6678 can detect PCIe connection in the IBL, and initialize PCIe if the board is work with PC host, and then continue the TFTP boot mode. If my board doesn't work with PC host, then continue the TFTP boot mode without PCIe initialization.

0 Snaku Lee26 over 6 years ago in reply to lding

Intellectual 310 points

Hi,

I do similar test on TI 6678 EVM without PC host, I add retry mechanism in the iblPCIeWorkaround( ) function and I call it before TFTP download the application code. The result is good, C6678 doesn't hang at hwEmif4p0Enable( ) and the application code run correctly.

I don't understand why iblPCIeWorkaround( ) function doesn't work on my board.

Regards,
Snaku

0 Snaku Lee26 over 6 years ago in reply to Snaku Lee26

Intellectual 310 points

Hi,

I remove below two lines of the iblPCIeWorkaround( ) function, and my board can continue TFTP boot process without PCIe connection.

DEVICE_REG32_W ((PCIE_BASE_ADDR + PCIE_APP_SERDES_CFG0), 0x00062320); /* ss clock, register address is 0x21800390 */
DEVICE_REG32_W ((PCIE_BASE_ADDR + PCIE_APP_SERDES_CFG1), 0x00022320); /* ss clock, register address is 0x21800394 */

What are these two registers, I can't find their definition.

Thank you,
Snaku

0 lding over 6 years ago in reply to Snaku Lee26

TI__Guru* 95265 points

Hi,

Those two are PCIE SERDES, see PCIE user guide 3.1.101 and 3.1.102.

Regards, Eric

0 Snaku Lee26 over 6 years ago in reply to lding

Intellectual 310 points

HI Eric,

Thanks for your reply.

One more question. What exactly action of 'FPGA_ICS557_SEL s driven high' on the EVM? Does it disable the PCIECLK(P/N) 100MHz reference clock from CDCE62005?

Regards,
Snaku

0 lding over 6 years ago in reply to Snaku Lee26

TI__Guru* 95265 points

Hi,

The PCIE reference clock input is muxed: either from CDCE62005 or AMC edge connector (from PCIE root complex). The FPGA_ICS557_SEL s driven high is for AMC edge connector; low for CDCE62005.

Regards, Eric

0 Snaku Lee26 over 6 years ago in reply to lding

Intellectual 310 points

Hi Eric,

I got it now, I did not find the multiplexer 'ICS557' because I took old version schematic.

One more question please. If there is no clock signal give to C6678 PCIECLK(P/N) for reference, and I find
C6678 could hang when I call devicePowerPeriph(TARGET_PWR_PCIE) or when I setting SERDES_CFG(0/1) register, is it normal?

Thank you,
Snaku

0 lding over 6 years ago in reply to Snaku Lee26

TI__Guru* 95265 points

Hi,

You need the signal input to power on the PCIE periph and configure the Serdes registers.

Regards, Eric

Processors

Processors forum

TMS320C6678: question about the iblPCIeWorkaround( ) function