AM3352: Ethernet switch with RMII interface

Sagar Verma

Part Number: AM3352

We are working on prototyping a hardware wherein we want to expand the ethernet ports on our platform based on AM3552.
The switch chosen is http://www.microchip.com/wwwproducts/en/KSZ8863

Connections are AM3552->RMII interface->KSZ8863

This device tree settings are as below

       cpsw_default: cpsw_default {
                pinctrl-single,pins = <
                        /* Slave 1 */
                        0x64 ( PIN_INPUT | MUX_MODE3 ) /* (U16) gpmc_a9.rmii2_crs_dv */
                        0x54 ( PIN_OUTPUT | MUX_MODE3 ) /* (V15) gpmc_a5.rmii2_txd0 */
                        0x50 ( PIN_OUTPUT | MUX_MODE3 ) /* (R14) gpmc_a4.rmii2_txd1 */
                        0x6c ( PIN_INPUT | MUX_MODE3 ) /* (V17) gpmc_a11.rmii2_rxd0 */
                        0x68 ( PIN_INPUT | MUX_MODE3 ) /* (T16) gpmc_a10.rmii2_rxd1 */
                        0x108 ( PIN_OUTPUT | MUX_MODE1 )/* (H16) gmii1_col.rmii2_refclk*/
                        0xbc ( PIN_OUTPUT | MUX_MODE7 ) /* (T4) lcd_data7.gpio2[13] */     <---GPIO being used as TXEN
                >;
        };

        cpsw_sleep: cpsw_sleep {
                pinctrl-single,pins = <
                        /* Slave 1 reset value */
                        0x64 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (U16) gpmc_a9.rmii2_crs_dv */
                        0x54 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (V15) gpmc_a5.rmii2_txd0 */
                        0x50 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /*gpmc_a4.rmii2_txd1 */
                        0x6c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* gpmc_a11.rmii2_rxd0 */
                        0x68 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* gpmc_a10.rmii2_rxd1 */
                        0x108 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* gmii1_col.rmii2_refclk*/
                        0xbc ( PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /*lcd_data7.gpio2[13] */
                >;
        };

&cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
        phy-mode = "rmii";
};

&cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
        phy-mode = "rmii";
};

&mac {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&cpsw_default>;
        pinctrl-1 = <&cpsw_sleep>;
        status = "okay"

};

The KSZ8863RLL can only operate in the MAC mode.

Can you advise us about the settings and the setup to make it work.

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

Hi,

MAC-to-MAC configuration is not supported by TI on the CPSW of Sitara devices. I'm sorry, we cannot help here.

0 -DK- over 7 years ago

TI__Mastermind 27890 points

Biser is correct in that we do not support MAC-to-MAC connections. However, I hadn't seen this particular device mentioned before so I took a quick look at the RMII timing and found it to be extremely tight when used in conjunction with the AM335x MAC.

Did you perform a RMII timing analysis on your product to ensure that this switch could be supported from a timing perspective?

0 Sagar Verma over 7 years ago in reply to -DK-

Prodigy 140 points

Hi Biser and DK

Thank you for your responses.

Our system is using the AM3352x custom board with
a. One of the MAC being used by the onboard SMSC LAN8710 PHY wired over RMII1.
b. The other MAC is wired to an external eval board of KSZ8863 (configured as a MAC) wired over RMII2 to be used as a switch.

Is it possible to achieve what we are doing (assuming that we use some other chip which has a PHY mode instead of the currently used KSZ8863) ?

I have below questions-

1. "I took a quick look at the RMII timing and found it to be extremely tight when used in conjunction with the AM335x MAC" -> It would be really helpful if you could tell your findings since we hadn't found anything as such since we are still in evaluation stage.

2. "Did you perform a RMII timing analysis on your product to ensure that this switch could be supported from a timing perspective?" -> We are evaluating the systems and haven't reached till this stage.

3. Can you please point to where people have done MAC to MAC and have been successful?

4. "we do not support MAC-to-MAC connections" -> is it problematic with the hardware or the firmware side ?

0 -DK- over 7 years ago in reply to Sagar Verma

TI__Mastermind 27890 points

Hi Sagar,
I can't comment definitively on your first question as to other devices that might work in this configuration. I'm not a PHY expert and don't keep up with all PHY offerings in the market. As I outlined earlier, your mention of the 8863 part piqued my interest because I hadn't heard of it previously.

1) You will need to perform a true timing analysis of RMII prior to PCB manufacture. Each PCB design is different, so it's important that you model your specific design to ensure that the PHY and MAC timing requirements can be met.
2) OK.
3) I'm not aware of one.
4) The RMII specification defines the interface as MAC-to-PHY so Sitara SoC MACs are not tested or characterized in MAC-to-MAC topologies. This applies to both SW and HW.

0 Sagar Verma over 7 years ago in reply to -DK-

Prodigy 140 points

Hi DK

Thank you for the detailed replies.
Presently we have dropped this chip KSZ8863 since its an unsupported case by TI.

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AM3352: Ethernet switch with RMII interface