• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 102 subscribers
  • Views 698 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6748: mapping multiple channels of same EDMA CC to different EDMA interrupts

AAAA PPPP
Expert 1410 points
Part Number: TMS320C6748

Hello,

I am using TMS320C648 LCDK kit. I want to use 2 channels suppose 2 and 3 of EDMA CC0. I want both channels to interrupt after DMA transfer completion. But they have to execute different ISRs. But there is only one interrupt from CC0            SYS_INT_EDMA3_0_CC0_INT1 . How can I map both these channels to different ISR on DMA completion?

Thanks in advance

With Regards

Shalini

  • 0
    Guru 13202 points

    Hello!

    In the similar situation I am catching EDMA interrupt with ISR of HWI type, read pending interrupts register and post actual handlers as SWIs.

  • 0 in reply to Victor Kazmirenko
    Expert 1410 points
    Hello,

    Sir you mean 'actual handlers as SWIs' the callbacks that we call from ISR of CC0_INT0 after checking IRR register?

    Thanks in advance

    With Regards

    Shalini
  • 0 in reply to AAAA PPPP
    Guru 13202 points

    Hello!

    I am not that strong in terminology, but assume that callback is a function called from some place. I think it is possible, but things heavily depends on what you try to achieve. When your ISRs for both EDMA events are really short, then there is no reason to bother separating them into different HWIs and thus different ISRs. However, if you already asked to separate, we could presume they might take time to complete or one needs prioritization between them. If latter is the case, calling another function from HWI ISR does not solve the problem. Instead, if you create two SWIs for your two events, each associated with specific processing function, then HWI ISR triggered by EDMA completion will only check pending register and post SWI thread through Swi_post(). This way you may have different priorities for multiple events.

    Hope this helps.

  • 0 in reply to Victor Kazmirenko
    Expert 1410 points
    Hello,

    I just want to confirm if there are more than 1 hardware interrupt associated with EDMA CC0.

    Thanks in advance

    With Regards
    Shalini
  • 0 in reply to AAAA PPPP
    TI__Guru* 84110 points
    Shalini,

    When you look through the list of DSP interrupts in Table 6-6 of the C6748 datasheet, you will find exactly 1 Transfer Completion Interrupt for each Channel Controller. There is only one hw interrupt per CC, but it will represent one or more of the TCCs.

    The method of handling multiple TCCs, from multiple channels, is to follow some or all of the procedures described by rrlagic. You may search E2E or your local library for EDMA Interrupt Dispatcher examples; I have seen them named EdmaIntDispatcher.c, for example. There are tricks to handling the various control registers correctly, so starting from a good given example would be best.

    Regards,
    RandyP