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Linux/AM3352: DDR3 speed grade

Part Number: AM3352

Tool/software: Linux

We have Beaglbone black based custom boards with AM3352.

REV1 has following memory

DDR : 256MB (MT41K128M16JT-125:K TR) -- Data rate - 1600 MT/s

eMMC : 4GB

REV2 has following memory

DDR : 512MB ( MT41K256M16TW-107:P TR ) - Data rate - 1866 MT/s

eMMC : 4GB ( actual size is 8GB however using enhanced mode so effective size is ~4GB)

We have same clock settings on both boards. On both the boards DDR is running at 400Mhz.

When I ran following two bench marking tools on both the boards. And found out that RAM speed is consistently low on REV2 Which I was expecting it to be high.

1. STREAM

2. lmbench

Below are the test results of STREAM

For REV1

-------------------------------------------------------------
STREAM version $Revision: 5.10 $
-------------------------------------------------------------
This system uses 8 bytes per array element.
-------------------------------------------------------------
Array size = 9000000 (elements), Offset = 0 (elements)
Memory per array = 68.7 MiB (= 0.1 GiB).
Total memory required = 206.0 MiB (= 0.2 GiB).
Each kernel will be executed 10 times.
 The *best* time for each kernel (excluding the first iteration)
 will be used to compute the reported bandwidth.
-------------------------------------------------------------
Your clock granularity/precision appears to be 3 microseconds.
Each test below will take on the order of 836646 microseconds.
   (= 278882 clock ticks)
Increase the size of the arrays if this shows that
you are not getting at least 20 clock ticks per test.
-------------------------------------------------------------
WARNING -- The above is only a rough guideline.
For best results, please be sure you know the
precision of your system timer.
-------------------------------------------------------------
Function    Best Rate MB/s  Avg time     Min time     Max time
Copy:             243.1     0.592447     0.592237     0.592682
Scale:            314.5     0.458120     0.457861     0.458296
Add:              400.9     0.538948     0.538737     0.539077
Triad:            310.5     0.695861     0.695728     0.696141
-------------------------------------------------------------
Solution Validates: avg error less than 1.000000e-13 on all three arrays
-------------------------------------------------------------

For REV2

# /home/stream_9M_c.exe
-------------------------------------------------------------
STREAM version $Revision: 5.10 $
-------------------------------------------------------------
This system uses 8 bytes per array element.
-------------------------------------------------------------
Array size = 9000000 (elements), Offset = 0 (elements)
Memory per array = 68.7 MiB (= 0.1 GiB).
Total memory required = 206.0 MiB (= 0.2 GiB).
Each kernel will be executed 10 times.
 The *best* time for each kernel (excluding the first iteration)
 will be used to compute the reported bandwidth.
-------------------------------------------------------------
Your clock granularity/precision appears to be 3 microseconds.
Each test below will take on the order of 842498 microseconds.
   (= 280832 clock ticks)
Increase the size of the arrays if this shows that
you are not getting at least 20 clock ticks per test.
-------------------------------------------------------------
WARNING -- The above is only a rough guideline.
For best results, please be sure you know the
precision of your system timer.
-------------------------------------------------------------
Function    Best Rate MB/s  Avg time     Min time     Max time
Copy:             237.9     0.605575     0.605404     0.605755
Scale:            305.5     0.471573     0.471323     0.471777
Add:              393.7     0.548840     0.548639     0.549065
Triad:            304.7     0.709157     0.709009     0.709323
-------------------------------------------------------------
Solution Validates: avg error less than 1.000000e-13 on all three arrays
-------------------------------------------------------------

If you see REV2 rates are lower than REV1. I don't understand this.

lmbench also gives similar results I have attached lmbench results log ( I had run lmbench script from ltp-ddt and ran the test) for REV1 and REV2.

Now question is why DDR on the REV2 is slow compared to DDR on REV1 ?

rev1_lmbench_with_no_custom_apps.txt
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|TRACE LOG| ***** STARTING LMBENCH SCRIPT ***** |
|TRACE LOG| CREATING THE FILE OF 16MB SIZE FOR BENCHMARKING|
16+0 records in
16+0 records out
16777216 bytes (16.0MB) copied, 7.503526 seconds, 2.1MB/s
|TRACE LOG| ***** STARTING BANDWIDTH BENCHMARKS ***** |
|TRACE LOG| MEMORY BANDWIDTH BENCHMARKS |
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 1M|
1.05 270.67
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 2M|
2.10 255.69
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 4M|
4.19 252.14
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 8M|
8.39 250.98
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 16M|
16.78 251.57
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 1M|
1.05 1085.48
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 2M|
2.10 1086.23
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 4M|
4.19 1084.92
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 8M|
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

rev2_lmbench_with_no_custom_apps.txt
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|TRACE LOG| ***** STARTING LMBENCH SCRIPT ***** |
|TRACE LOG| CREATING THE FILE OF 16MB SIZE FOR BENCHMARKING|
16+0 records in
16+0 records out
16777216 bytes (16.0MB) copied, 7.494613 seconds, 2.1MB/s
|TRACE LOG| ***** STARTING BANDWIDTH BENCHMARKS ***** |
|TRACE LOG| MEMORY BANDWIDTH BENCHMARKS |
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 1M|
1.05 260.52
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 2M|
2.10 245.88
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 4M|
4.19 244.57
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 8M|
8.39 242.96
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - rd|
|TRACE LOG| Memory Blk Size - 16M|
16.78 243.70
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 1M|
1.05 1088.49
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 2M|
2.10 1071.98
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 4M|
4.19 1088.16
|TEST RESULT|PASS|bw_mem|
|TEST END|bw_mem|
|TEST START|bw_mem|
|TRACE LOG| Parameters : |
|TRACE LOG| Operation - wr|
|TRACE LOG| Memory Blk Size - 8M|
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • Hi Ankur

    I know the first thing they will ask is the DDR configurations please add that to the e2e post. I wonder if the refresh cycle is different between the 2 system? the bandwidth for the transfers should be the same between your rev1 board and rev2 board because they are running at 400Mhz. The question becomes in the CAS and RAS delay i wonder if we set it up differently between the rev1 and rev2 board?

    Thanks

  • Hi Mohsen,

    Thank you for reply,

    below are EMIF dump from both the boards

    For REV1

    # ./omapconf dump emif
    OMAPCONF (rev v1.73-19-gbe8626b built Wed Sep 13 10:18:44 EDT 2017)
    
    HW Platform:
      Generic AM33XX (Flattened Device Tree)
      AM3352 ES2.1 GP Device (UNKNOWN performance ZCE package (600MHz))
      UNKNOWN POWER IC
      UNKNOWN AUDIO IC
    
    SW Build Details:
      Build:
    release_details_get(): could not open /etc/issue.net file?!
        Version: UNKNOWN
      Kernel:
        Version: 4.4.32-001-ts-armv7l
        Author: ankur@ankur-HP-Z440-Workstation
        Toolchain: gcc version 4.9.4 (Timesys 20170906)
        Type: #6
        Date: Wed Apr 4 15:50:52 EDT 2018
    
    |--------------------------------------------------------|
    | EMIF4D Reg. Name           | Reg. Address | Reg. Value |
    |--------------------------------------------------------|
    | EMIF4D_EMIF_MOD_ID_REV     | 0x4C000000   | 0x40443403 |
    | EMIF4D_STATUS              | 0x4C000004   | 0x40000000 |
    | EMIF4D_SDRAM_CONFIG        | 0x4C000008   | 0x61C04BB2 |
    | EMIF4D_SDRAM_CONFIG_2      | 0x4C00000C   | 0x00000000 |
    | EMIF4D_SDRAM_REF_CTRL      | 0x4C000010   | 0x0000093B |
    | EMIF4D_SDRAM_REF_CTRL_SHDW | 0x4C000014   | 0x0000093B |
    | EMIF4D_SDRAM_TIM_1         | 0x4C000018   | 0x0AAAD4DB |
    | EMIF4D_SDRAM_TIM_1_SHDW    | 0x4C00001C   | 0x0AAAD4DB |
    | EMIF4D_SDRAM_TIM_2         | 0x4C000020   | 0x2C437FDA |
    | EMIF4D_SDRAM_TIM_2_SHDW    | 0x4C000024   | 0x2C437FDA |
    | EMIF4D_SDRAM_TIM_3         | 0x4C000028   | 0x501F83FF |
    | EMIF4D_SDRAM_TIM_3_SHDW    | 0x4C00002C   | 0x501F83FF |
    | EMIF4D_PWR_MGMT_CTRL       | 0x4C000038   | 0x00000000 |
    | EMIF4D_PWR_MGMT_CTRL_SHDW  | 0x4C00003C   | 0x00000000 |
    | EMIF4D_INT_CONFIG          | 0x4C000054   | 0x00FFFFFF |
    | EMIF4D_INT_CFG_VAL_1       | 0x4C000058   | 0x8000140A |
    | EMIF4D_INT_CFG_VAL_2       | 0x4C00005C   | 0x00021616 |
    | EMIF4D_PERF_CNT_1          | 0x4C000080   | 0x68F5FEB4 |
    | EMIF4D_PERF_CNT_2          | 0x4C000084   | 0x16739ACB |
    | EMIF4D_PERF_CNT_CFG        | 0x4C000088   | 0x00010000 |
    | EMIF4D_PERF_CNT_SEL        | 0x4C00008C   | 0x00000000 |
    | EMIF4D_PERF_CNT_TIM        | 0x4C000090   | 0x0D28C06D |
    | EMIF4D_READ_IDLE_CTRL      | 0x4C000098   | 0x00050000 |
    | EMIF4D_READ_IDLE_CTRL_SHDW | 0x4C00009C   | 0x00050000 |
    | EMIF4D_IRQSTATUS_RAW_SYS   | 0x4C0000A4   | 0x00000000 |
    | EMIF4D_IRQSTATUS_SYS       | 0x4C0000AC   | 0x00000000 |
    | EMIF4D_IRQENABLE_SET_SYS   | 0x4C0000B4   | 0x00000000 |
    | EMIF4D_IRQENABLE_CLR_SYS   | 0x4C0000BC   | 0x00000000 |
    | EMIF4D_ZQ_CONFIG           | 0x4C0000C8   | 0x50074BE4 |
    | EMIF4D_RDWR_LVL_RMP_WIN    | 0x4C0000D4   | 0x00000000 |
    | EMIF4D_RDWR_LVL_RMP_CTRL   | 0x4C0000D8   | 0x00000000 |
    | EMIF4D_RDWR_LVL_CTRL       | 0x4C0000DC   | 0x00000000 |
    | EMIF4D_DDR_PHY_CTRL_1      | 0x4C0000E4   | 0x00000006 |
    | EMIF4D_DDR_PHY_CTRL_1_SHDW | 0x4C0000E8   | 0x00000006 |
    | EMIF4D_PRI_COS_MAP         | 0x4C000100   | 0x00000000 |
    | EMIF4D_CONNID_COS_1_MAP    | 0x4C000104   | 0x00000000 |
    | EMIF4D_CONNID_COS_2_MAP    | 0x4C000108   | 0x00000000 |
    | EMIF4D_RD_WR_EXEC_THRSH    | 0x4C000120   | 0x00000305 |
    |--------------------------------------------------------|
    

    For REV2

    # ./omapconf dump emif
    OMAPCONF (rev v1.73-19-gbe8626b built Wed Sep 13 10:18:44 EDT 2017)
    
    HW Platform:
      Generic AM33XX (Flattened Device Tree)
      AM3352 ES2.1 GP Device (UNKNOWN performance ZCE package (600MHz))
      UNKNOWN POWER IC
      UNKNOWN AUDIO IC
    
    SW Build Details:
      Build:
    release_details_get(): could not open /etc/issue.net file?!
        Version: UNKNOWN
      Kernel:
        Version: 4.4.32-001-ts-armv7l
        Author: ankur@ankur-HP-Z440-Workstation
        Toolchain: gcc version 4.9.4 (Timesys 20170906)
        Type: #6
        Date: Wed Apr 4 15:50:52 EDT 2018
    
    |--------------------------------------------------------|
    | EMIF4D Reg. Name           | Reg. Address | Reg. Value |
    |--------------------------------------------------------|
    | EMIF4D_EMIF_MOD_ID_REV     | 0x4C000000   | 0x40443403 |
    | EMIF4D_STATUS              | 0x4C000004   | 0x40000000 |
    | EMIF4D_SDRAM_CONFIG        | 0x4C000008   | 0x61C05332 |
    | EMIF4D_SDRAM_CONFIG_2      | 0x4C00000C   | 0x00000000 |
    | EMIF4D_SDRAM_REF_CTRL      | 0x4C000010   | 0x00000C30 |
    | EMIF4D_SDRAM_REF_CTRL_SHDW | 0x4C000014   | 0x00000C30 |
    | EMIF4D_SDRAM_TIM_1         | 0x4C000018   | 0x0AAAD4DB |
    | EMIF4D_SDRAM_TIM_1_SHDW    | 0x4C00001C   | 0x0AAAD4DB |
    | EMIF4D_SDRAM_TIM_2         | 0x4C000020   | 0x3E6B7FDB |
    | EMIF4D_SDRAM_TIM_2_SHDW    | 0x4C000024   | 0x3E6B7FDB |
    | EMIF4D_SDRAM_TIM_3         | 0x4C000028   | 0x501F867F |
    | EMIF4D_SDRAM_TIM_3_SHDW    | 0x4C00002C   | 0x501F867F |
    | EMIF4D_PWR_MGMT_CTRL       | 0x4C000038   | 0x00000000 |
    | EMIF4D_PWR_MGMT_CTRL_SHDW  | 0x4C00003C   | 0x00000000 |
    | EMIF4D_INT_CONFIG          | 0x4C000054   | 0x00FFFFFF |
    | EMIF4D_INT_CFG_VAL_1       | 0x4C000058   | 0x8000140A |
    | EMIF4D_INT_CFG_VAL_2       | 0x4C00005C   | 0x00021616 |
    | EMIF4D_PERF_CNT_1          | 0x4C000080   | 0x67C8F334 |
    | EMIF4D_PERF_CNT_2          | 0x4C000084   | 0x15F66294 |
    | EMIF4D_PERF_CNT_CFG        | 0x4C000088   | 0x00010000 |
    | EMIF4D_PERF_CNT_SEL        | 0x4C00008C   | 0x00000000 |
    | EMIF4D_PERF_CNT_TIM        | 0x4C000090   | 0x717F2D5D |
    | EMIF4D_READ_IDLE_CTRL      | 0x4C000098   | 0x00050000 |
    | EMIF4D_READ_IDLE_CTRL_SHDW | 0x4C00009C   | 0x00050000 |
    | EMIF4D_IRQSTATUS_RAW_SYS   | 0x4C0000A4   | 0x00000000 |
    | EMIF4D_IRQSTATUS_SYS       | 0x4C0000AC   | 0x00000000 |
    | EMIF4D_IRQENABLE_SET_SYS   | 0x4C0000B4   | 0x00000000 |
    | EMIF4D_IRQENABLE_CLR_SYS   | 0x4C0000BC   | 0x00000000 |
    | EMIF4D_ZQ_CONFIG           | 0x4C0000C8   | 0x50074BE4 |
    | EMIF4D_RDWR_LVL_RMP_WIN    | 0x4C0000D4   | 0x00000000 |
    | EMIF4D_RDWR_LVL_RMP_CTRL   | 0x4C0000D8   | 0x00000000 |
    | EMIF4D_RDWR_LVL_CTRL       | 0x4C0000DC   | 0x00000000 |
    | EMIF4D_DDR_PHY_CTRL_1      | 0x4C0000E4   | 0x00100007 |
    | EMIF4D_DDR_PHY_CTRL_1_SHDW | 0x4C0000E8   | 0x00100007 |
    | EMIF4D_PRI_COS_MAP         | 0x4C000100   | 0x00000000 |
    | EMIF4D_CONNID_COS_1_MAP    | 0x4C000104   | 0x00000000 |
    | EMIF4D_CONNID_COS_2_MAP    | 0x4C000108   | 0x00000000 |
    | EMIF4D_RD_WR_EXEC_THRSH    | 0x4C000120   | 0x00000305 |
    |--------------------------------------------------------|
    

    Meanwhile let me read TRM to answer your other questions.

    Thank you,

    Regards,

    Ankur

  • Changing the DDR speed grade will not affect system performance. The limiting factor is the maximum DDR clock frequency of 400MHz. Both memories will perform in DDR3-800 mode.
  • Thank you for reply Biser,

    In that case also both the boards should have same speed isn't it ? I consistently get low speed on REV2 board. I am not able to understand that.

    Regards,
    Ankur

  • And one more question, While performing DDR leveling which speed bin tables are to be referred ? one corresponding to DDR-800 or the one corresponding to DDR-1866. We did DDR leveling by referring speed bin table of DDR-1866.
  • You should use the speed bin table corresponding to your device speed, but from it you should use the values that correspond to 400MHz clock rate.
  • Thank you for reply Biser,

    do you doubt DDR tuning for this speed difference what we are seeing ? or do you doubt something else for this speed difference between two DDRs.
  • Hi Ankur

    We ahve done some memory test using lmbench. I suggest you sue the same test that we use that way we can compare apple to apple. Below is the site that has the ti bench mark for memory read and write and other peripherals.

    processors.wiki.ti.com/.../Processor_SDK_Linux_Kernel_Performance_Guide

    Below gives you the source code for the bench mark. 

    processors.wiki.ti.com/.../Lmbench

  • Hi Mohsen,

    Sorry for late reply,

    I have captured lmbench results and updated in the format as mentioned in above link.

    I have attached the excel with last two column updated for our  REV1 and REV2 board lmbench results.

    Let me know if I should start looking into some configuration of DDR.

    Thanks,

    Regards,

    Ankur

    lmbench_REV1_REV2_comparision_with_TI_boards.xlsx

  • Do you have the EMIF spreadsheets that correspond to each of these configurations?  They are clearly different, and I expect the difference explains the behavior.  It would be much easier to compare the spreadsheets instead of decoding all the registers and comparing.

  • Hi Brad,

    I don't have EMIF spreadsheet,
    Can you point me to EMIF spreadsheet, I can update it and attach here.

    Thank you,

    Regards,
    Ankur
  • HI Brad,

    I compared the EMFI registers so only difference we have is with respect to following registers

    EMIF4D_SDRAM_CONFIG

    EMIF4D_SDRAM_REF_CTRL 

    EMIF4D_SDRAM_TIM_2

    EMIF4D_SDRAM_TIM_3

    EMIF4D_PERF_CNT_1

    EMIF4D_PERF_CNT_2

    EMIF4D_PERF_CNT_TIM

    EMIF4D_DDR_PHY_CTRL_1


    I don't see anything fishy. ( or I don't understand )
    Do you have any suggestion for me ? What should I check next ?

    Thanks,

    Regards,
    Ankur

  • Hi Brad,

    I am kind of stuck with this issue and don't know what/where to look.
    Any suggestion/pointer to move forward?

    Thank you,

    Regards,
    Ankur
  • Sorry for the delay.  There's no "out of office" reply for the forum!

    According to your spreadsheets, tRFC went from 63 to 103.  I'm not surprised to see some minor performance degradation as a result.  I double checked in the Micron data sheet, and this is indeed a difference between the 2Gb and 4Gb devices, i.e. this timing is slower for the 4Gb device.  So in short, I think the answer here is that things are behaving as one might expect.

  • Hi Brad,

    Thank you for reply.

    Is there something we can do to improve performance ?

    Can we change other mode/parameter of EMIF to improve the performance ?

    Thanks,

    Regards,

    Ankur

  • You would need to choose a different memory device with better timings if you wanted to improve the performance.  This is a memory limitation, not a processor limitation.

  • Hi Brad,

    In our board, AM335x is operating at 550Mhz but if I change to 600Mhz I see performance improvement. ( Though I ran only STREAM benchmark only haven't run lmbench. I am not 100% sure about performance improvement).
    I am not understanding as to why that would improve DDR performance , as DDR is still operating at 400Mhz isn't it ?

    Thank you,

    Regards,
    Ankur
  • It is all inter-related. For a benchmark that's memory intensive, the "main knob" will be the DDR speed. However, there's still some component related to the CPU speed. It is a diminishing return though. If you crank the CPU to 1 GHz you might still see slightly better performance, but not a huge leap (for this benchmark).