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Linux/AM3359: 16 bit Data & Address Multiplexed GPMC Bus with FPGA

Mobin P K
Expert 1035 points

Part Number: AM3359

Tool/software: Linux

Hello,

We have planned to interface AM3359 processor's 16 bit Address & Data Multiplexed GPMC bus with FPGA in asynchronous mode.

Throughput of the same has been calculated and attained 11.219 MBytes/sec based on 100MHz GPMC F_CLCK and ~17 Clock pulse for  a single 16 bit address & Data.

Please Clarify my following doubts

1) Whether my calculation is correct or not ?

2) Is this the maximum throughput of GPMC bus in 16 bit Address & Data Multiplexed Asynchronous Mode.

3) If I am configuring the GPMC timing parameters in device tree with maximum feasible values whether I can improve my throughput or not ?

4) Is it possible to reduce the clock cycles for a single Address & data transmission from 17 for 16 bit. if yes what is the minimum feasible clocks need for transmitting single 16 bit address & data (Note: Slave is Artix-7 FPGA and implementing NOR Protocol for write/ read)

5) Is it possible to achieve 50 MBytes/sec throughput using GPMC with the mentioned mode above.

thanks

Mobin P K

  • 0
    TI__Mastermind 30601 points

    Hi Mobin P K,

    Let me dig into your questions and get back to you by the end of the week. There will be some latencies between GPMC read/write bursts that need to be considered.

    Regards,
    Mark

  • 0 in reply to Mark M
    TI__Mastermind 30601 points
    Hi Mobin P K,

    1) Trying to reproduce your calculaton for 11.219 MBytes/sec...

    10ns clock cycle
    17 clk cycles per access
    16 bits per access
    Max throughput =((16/(10*10^(-9)*17))/8)/1000000
    11.76 Megabytes per second


    2) You should consider the page mode (burst for asynch), where 16 words can be transmitted in each access without needing to send the address before each word. These calculations are theoretical maximums that do not account for any latencies between accesses or bursts. MMU and cache can affect these also.

    3) The GPMC is entirely programmed through its timing parameters, and the device tree (DTS) is the correct place to define these parameters. The throughput does depend on how compressed these timing parameters can get without violating any signal timings.

    4) I think it may be possible, but you need to provide the setup and hold time requirements from your synthesized FPGA implementation. It wont be published in the FPGA datasheet.

    5) I don't know that it will support 50MB/s. Let me run some experiments to try to find out. I encourage you to do the same with the EVM - the Beagle Bone Black makes tapping the GPMC signals easy with the GPMC signals routed to its 0.1" header.

    Regards,
    Mark
  • 0 in reply to Mark M
    Expert 1035 points
    Hello Sir,

    Thanks for your valuable reply,

    11.76 Megabytes per second throughput for a single read/write.

    What is the maximum throughput of GPMC bus for the page mode (burst for asynch) ? How can I calculate the same ?

    thanks
    Mobin
  • 0 in reply to Mobin P K
    TI__Mastermind 30601 points
    Hi Mobin,

    Maximum throughput depends on the GPMC register settings and the software overhead between each GPMC access cycle.

    GPMC register settings define the read or write access cycle. These specify the timing of each control signal and the read/write access time and need to meet the timings of the memory/FPGA connected to the GPMC.

    The most compressed these timings can be might be something like the below...

    Control Sig GPMC_FCLK count from StartCycleTime

    CSOn 0
    ADVONTIME 1
    ADVOFFTIME 3
    WE/OEONTIME 3
    RD/WRACCESSTIME 5
    WE/OEOFFTIME 6
    CSoff 7
    RD/WRCYCLETIME 8

    But the device on the other side (memory/FPGA) may require additional time to satisfy setup/hold time or to fetch data during a read or stall the bus during a write.

    In between accesses or bursts of accesses, there is always overhead.

    So the throughput can be measured as data transferred over (Rd/Wr Cycle Time + Overhead).

    With the above compressed cycle, with 64-bit reads from GPMC, but burst/page mode disabled, I am seeing about 24MB/s throughput.

    In theory this number should improve with a burst of 16 words, but I need to find the software that supports a 16-word burst.

    Hope this helps,
    Mark