• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 101 subscribers
  • Views 422 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5728: best way to interface an ADS1606

Alex A
Prodigy 40 points
Part Number: AM5728
Other Parts Discussed in Thread: ADS1606,

What would be the best way to connect an ADS1606 to the AM5728 while using as little as possible glue logic?

I see the GPMC as one option, but in the future I would like to be able to connect 3 of these ADCs, and with the GPMC PCB routing becomes a bit complicated, since the 16 bits of data will have to be connected in parallel.

Would it be possible to configure the VIP to get data from the ADS1606? To have the VIP read a 16 bit word on each pixel clock and store it in a buffer, working without a horizontal or vertical sync lines?

I have a AM572x EVM I'm working with and plan to make a daughter board with the ADC (instead of the LCD module), so if the suggested interfaces were available on the AM572x GP EVM expansion connectors, that would be even more helpful.

Maybe there is and example project available somewhere that shows the AM5728 getting data from an ADC at several MSPS?

  • 0
    TI__Mastermind 46460 points

    Alex,

    I am not aware of a reference design interfacing to an ADC like you described.  The GPMC can do this but you may have dropped samples depending on the other processing in the device.  GPMC is a low priority interface primarily intended for accessing memory interfaces, not a streaming data interfaces.  You would need validate successful operation of your complete software implementation.  Note that moving the samples from the ADC using DMA transfers from the FIFO will yield best performance. 

    I am not aware whether the VIP can support general streaming data.  I will look into this and get back to you.

    Tom

  • 0 in reply to Tom Johnson 16214
    TI__Mastermind 46460 points

    Alex,

    VIP can capture generic data but it needs to see HSYNC and VSYNC signals. These would need to be generated from glue logic.  There is a FAQ under the VIP section in linux kernel driver on this:

    http://software-dl.ti.com/processor-sdk-linux/esd/docs/05_01_00_11/linux/Foundational_Components_Kernel_Drivers.html#vip

    FAQ
    Can VIP be used as high speed interface to bring any data in?
    VIP can be used as high speed interface to bring any data as is (without any modifications) into the device. Following points to keep in mind –
    • Data should be sent in discrete sync mode.
    • No other VIP internal processing blocks like color space conversion, scaling or chroma format conversion should be used.
    • Refer to Driver_Features section if there is need to bring data in resolution greater than the one supported by driver.
    • If the cropping feature is disabled in VIP parser due to the need for capturing larger resolution and if interested in capturing last frame (that could be only frame), FPGA need to send additional VSYNC signal else the last frame will not get transferred to DDR.
    • Add vip_fmt entry in the vip_formats table inside drivers/media/platform/ti-vpe/vip.c per sub-device driver need for ”.fourcc”, ”.code” and ”.colorspace”. Keep ”.coplanar” as 0. Refer to the entries of VPDMA_DATA_FMT_RAW8 in drivers/media/platform/ti-vpe/vpdma.c file for “vpdma_fmt” settings when using VIP slice in 8 bit port mode. Refer to the VPDMA_DATA_FMT_RAW16 format settings for 16 bit mode. Note that VIP driver supports only 8 bit RAW mode. Enabling 16 bit RAW mode capture needs minor driver modifications. If custom entries are not needed, then any of the raw format entries can be used. In that case, sensor driver will need to configure media bus format as ”.code” settings as shown in the vip_fmt.

    Tom