Hi,
Please tell me the clock source of MDIO_CLK.
Although there is the following description of TRM, I did not know the clock where "clk frequency" in this description indicates.
Table 15-253. MDIO_CTRL Register Field Descriptions
15-0 CLKDIV
Clock divider.
This field specifies the division ratio between CLK and the frequency of MDIO_CLK.
MDIO_CLK is disabled when clkdiv is set to 0.
MDIO_CLK frequency = clk frequency/(clkdiv+1).
Best Regards,
Shigehiro Tsuda
