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TMS320C6748: Multiple Interrupt Handling

Tyler Turcotte
Prodigy 240 points
Part Number: TMS320C6748

Good Afternoon,


I have a question regarding the handling of maskable interrupts with the TMS320C6748 LCDK.  I have reviewed the TMS320C674x DSP CPU and Instruction Set document on interrupts but haven't received a clear picture of what is happening.

If I utilize three different interrupts what happens in the event I receive one interrupt and then during that interrupt, a second interrupt is triggered?  I understand that there is no nested interrupts based on priority unless written into the software.  Will the interrupt routine for the second interrupt follow once the interrupt for interrupt 1 has been completed or is that second interrupt not even flagged and therefor it is ignored?  My understanding from the documentation that the interrupts are disabled during interrupts routines and will never be received.  Is this true?  Therefore you cannot run multiple interrupts at the same time as you can miss that moment when you need to answer an interrupt from an interrupt.

In utilizing the UART interrupt to receive information from a serial terminal, sometimes the interrupt does not appear to be flagged when sending data from the serial terminal which results in missed information.  I have other interrupts running while I await this UART interrupt.  So maybe I need to switch to a polling routine.

Thanks,

Tyler

  • 0
    TI__Mastermind 27355 points

    Hi Tyler,

    While in the ISR, interrupts are indeed disabled but any incoming interrupts during this time will still be serviced after re-enabling interrupts. However, if multiple of the same interrupt occurs while in the ISR then only one of the interrupts will get serviced after leaving the ISR. 

    If you have multiple, different interrupts, they will be serviced based on their priority. Refer to Table 5-1 in the TMS320C674x DSP CPU and Instruction Set User's Guide for a table of interrupt priorities. 

    It's generally recommended to keep your ISR as short as possible to avoid missing interrupts, e.g., just set a flag and do any processing outside of the ISR.