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AM3358: DDR3 data read hold time

Peng Liu50174
Expert 1480 points
Part Number: AM3358

Hi,

We are planning to use AM3358 to work with one DDR3 chip (400MHz, 800MT/s).

Before PCB release for manufacture, we did Hyperlynx simulation.

The simulation report shows that some  data read hold time violates the margin requirement.

For example, DDR_D9 data read hold time margin is -45.2ps, and the simulation waveform shows a hold time of 454.8ps. So it means 500 ps is the limit for the data read hold time.

I checked AM335X datasheet, didn't find data read hold time limit of 500ps. So where can I get the data read hold time limit specification for AM335X?

thanks,

  • 0
    TI__Guru*** 125430 points

    Peng Liu,

    Please see the note on this page:

    https://processors.wiki.ti.com/index.php/How_to_use_the_AM335x_IBIS_Models

    Here's a copy/paste:

    NOTE: TI does not support timing analysis with IBIS simulations. Rather, customers are encouraged to use the IBIS models for Signal Integrity (SI) analysis. As far as the timing goes, please follow the routing guidelines and length/skew matching requirements in the Data Manual.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Expert 1480 points

    Hi, Brad,

    I followed the AM335x IBIS models usage. As its IBIS model does not support timing analysis, can you recommend the latest DDR3 routing guideline for AM335X?

    BTW: Do all TI processors' IBIS models not support timing analysis?

    Thanks,

    Peng

  • 0 in reply to Peng Liu50174
    TI__Guru* 81090 points

    Peng, correct, the IBIS models do not support timing analysis, only signal integrity.  The latest routing guidelines can be found in the AM3358 datasheet.  These are provided in lieu of timing data.  If these guidelines are followed, timing simulations are not necessary. 

    Regards,

    James