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C5515 SAR ADC SARCLKCTRL register issue.

John Tomson
Prodigy 250 points
Other Parts Discussed in Thread: TMDX5515EZDSP

According to SPRUFP1 p. 19 I shuld be adble to modify the ADCCLKDIV register in a range 1-32768. But when I load my code on my TMDX5515EZDSP here what I see:

I am only able to change the value from 0 to 127. What's wrong with my device?

  • 0
    TI__Expert 8065 points

    Thanks for your input. We will take a look at this. 

     

  • 0 in reply to Peter Chung
    TI__Mastermind 23785 points

    Yes. According to the description on page 19, the ADCCLKDIV value can be 32768-1, which is 0x7FFF hex.

    I accessed the EzDSP with a Blackhawk 560m JTAG emulator and wrote 0xFFFF to ADCCLKDIV, it returned as 0x7FFF, which is correct as stated.

    0x00007012 0x3C00 0x0000 0x0000
    0x00007015 0x0000 0x7FFF 0x0000
    0x00007018 0x7104 0x0000 0x0000

    Does your code programmed the 0x30D7 value to the register? Can you change the value directly with your tool like I did with I/O memory?

  • 0 in reply to Steve Tsang
    Prodigy 250 points

    Finqally I got it throug. But still cannot change ADCCLKDIV directly. If it possible try it on the same board as mine and tell the results. I'am still concerned where did _RESV_1 come from.

  • 0 in reply to John Tomson
    TI__Mastermind 23785 points

    John,

    Could you explain more on your problem? What do you mean by"got it through"? Does you SW tool allow you to access I/O mapped register directly? You should be able to change directly via I/O mapping. Also, what is the "_RESV_1"?

  • 0 in reply to Steve Tsang
    Prodigy 250 points

    The problem is that I cannot change ADCCLKDIV for values greater then 127 directly from the "Registers" Window of CCS debugger (see my first post and a screenshot for details). _RESV_1 value come from nowhere. It does not persist in the manuals anywhere. I "got it through" means that I am able to change I/O memory section to enter the requied value and also I am able to do this using CSL both by SAR_chanSetup and SAR_chanConfig APIs. _RESV_1 is a part of SARCLKCNTRL register as you can see from the screenshot.

    So, the question is where does _RESV_1 is come from? I cannot find any information about it. Does it because I am using TMDXC5515EZDSP, which has TMX320C5515 chip on board instead of regular TMS320****? Also as I've asked is it possible for you to reproduce the issue(I mean look at the values of SARCLKCNTRL register) on the same device to figure out the sorce of the problem.

  • 0 in reply to John Tomson
    TI__Mastermind 23785 points

    John,

    Bit 15 is reserved and bit 14-0 is ADCCLKDIV. CCS4 register viewer partitioned the bits in the register for easy viewing. So ii displays as _RESV_1 and ADCCLKDIV. But it partitioned the bits incorrectly. Only 7 bits for the ADCCLKDIV. I can change the whole sARCLKCTRL register to 0xFFFF at SARCLKCTRL level.

    The viewer is for viewing debug but not normal program execution. You can use CSL to program it correctly thus is good.

    I will log this issue to next CCS4 release.

  • 0 in reply to Steve Tsang
    Prodigy 250 points

    Ok, that is answer my question. Thank you.