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AM6546: AM6546 DDR4 routing

Tauseef Kazi
Intellectual 290 points
Part Number: AM6546

Hi,

We are using the AM6546 with 4x1GB DDR4 configuration.

There is a guideline to Avoid return path discontinuities by adding vias or capacitors whenever signals change layers and
reference planes.

We are finding it difficult in routing to follow this due to space constraints.

For reference we took the EVM and found that even the EVM was unable to follow this.

We need to know how much will be the impact of this on DDR4 SI.

If yes then how do we overcome this because we cannot put GND vias below the DDR4 as no space available.

Regards

Tauseef Kazi

  • 0
    Intellectual 290 points

    Hi,

    Is there any update on this?

    Do we have a solution for this?

    Regards

    Tauseef Kazi

  • 0 in reply to Tauseef Kazi
    TI__Mastermind 32775 points

    Hi,

    My understanding per feedback from colleagues is that this is a general guideline for all high speed routing, not a specific DDR4 issue. Additional information provided:

    "Any time that the a signal goes through a via and its reference plane changes, there needs to be a return path for the high-frequency current.  If both reference planes are ground, then a via connecting the 2 planes should be nearby.  Alternately, as is often done with DDR, if the signal is an address signal transitioning from a ground reference to a VDDQ reference, there should be a capacitor nearby that provides the return path.  As a rule-of-thumb for DDR layouts, I recommend that this via or capacitor be located within 100mils of the transition via.  Normally these vias all occur under the SOC PHY and under the SDRAM so there should be plenty of ground vias and decoupling caps nearby."

    Best regards,
    Kevin