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Part Number: PROCESSOR-SDK-DRA8X-TDA4X
Hi,
We are working on TDA4, with PSDK version "psdk_rtos_auto_j7_07_00_00_11" and tidl version "tidl_j7_01_02_00_11". We have imported a tidl model and ran the inference on tidl test bench in PC emulation mode. We ran the tidl test bench on hardware(EVM) and got the output generated. The output of PC emulation is not matching with the hardware output. We generated the trace level outputs and compared between PC emulation and hardware. The differences are observed form the 81st layer of 130 layers.
What could be the reason for this difference in the outputs?
While running it on hardware(EVM) we observed some warnings,
Warning: StrideWidth 2 Stride Height 2 KernelWidth 3 Kernel Height 3 KBlocks 19
Warning: Nat C will be called
What is the reason for these warnings ?
Regards,
Hruday.
Hi Hruday,
Can you provide the details of the first layer where you are observing mismatch?
Regarding the warning : it indicates that optimized implementation is not available for this configuration. Can you provide more details about this layers property here?
Regards,
Anshu
Hi Anshu,
We will share the details through e-mail and upload the relevant data over FTP.
Regards,
Hruday.
Anshu,
There are 3 issues that are being tracked as part of this ticket.
Regards
Karthik
Hi Karthik,
Issue 2 and 3 are related and MMALIB team is looking into it.
Regards,
Anshu
Hi Hruday,
We have provided the reason for failure and suggested alternative over email. Let us know if you have any further question, if not can we close this thread?
Regards,
Anshu