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Compiler/PROCESSOR-SDK-DRA8X-TDA4X: why mcu's clock works not accurately when I allocate the .bss data in DDR area?

user4431315
Intellectual 380 points

Part Number: PROCESSOR-SDK-DRA8X-TDA4X

Tool/software: TI C/C++ Compiler

Hi:

    When I run my mcu routine, I find that the mcu's clock is not correct after A72、C6X and C7X core startup. And I also find that the reason of this phenomenon is that I allocate mcu's .bss data in DDR area. When I allocate muc's .bss data in SRAM area, the mcu's clock works normaly.

    So I want to know why mcu's code or data works in DDR(work with A72 C6X and C7X) will lead to mcu's clock works not accurately? And if my code or data is large enough and I have to allocate my code or data in DDR,how to avoid this phenomenon?

    eg:If my mcu's clock is 5ms, when code or data runs in DDR, the time of clock will be 4ms or 5ms or 6ms,even if 7ms and 8ms. But when mcu's code and data are in SRAM, the mcu's clock will only be 5ms!

Thanks!