DRA74P: moving from single die to dual die 8GB DDR issue

Kevin,

It's not twin die in the sense that you're thinking.  Here's a snippet from the data sheet:

Uses two x8, 4Gb Micron die to make one x16 package

From an electrical load perspective, this is equivalent to using two 8-bit DDR3 devices, which is a supported configuration.

Best regards,
Brad

Colombo Carlo said:

 What consequences there are on the configuration of DDR controller moving from 2 p.n.

On  p.n. MT41K512M16VRP-107 AIT:P  I see  page size per DIE =1KB

On  p.n. MT41K512M16HA-125 AIT:A I see page size =2K

I need to configure inside Emif controller  Bank/columns/Rows with different value?

You don't need to change the values from the EMIF perspective as it looks the same.

Colombo Carlo said:

what about multi die  handling by EMIF ? any other concern / issue to take care ? 

This will change the loading on the address/control lines.  Is the customer using VTT termination on the address/control (hopefully yes)?  Ideally the customer should perform IBIS simulations for these two different devices to determine the optimum configuration of the drive strength, especially on the address/control lines where the loading will double.  Data lines may also change slightly due to the fact that it's a different device, but it will still be a single load.

Carlo,

Does the customer have JTAG available on their board, plus a TI probe and CCS?  If so, I have a script that will scrape their DDR configuration and do some analysis.  The customer can download the script here:

http://git.ti.com/sitara-dss-files/am57xx-dss-files/blobs/raw/main/am57xx-ddr.dss

They should attempt to boot the board as usual (i.e. the DDR should be in its configured state), and then they should run the script by following the directions here:

http://git.ti.com/sitara-dss-files/am57xx-dss-files/blobs/main/README

The script will output a *.txt file to their desktop.  Please post it here.

Best regards,
Brad

Hi Carlo,

Brad and I have discussed internally and agree that we don't see any specific issues with that device / topology. I apologize for the confusion.

Thanks,
Kevin

Closing this thread. We can re-open if needed.