- Ask a related questionWhat is a related question?A related question is a question created from another question. When the related question is created, it will be automatically linked to the original question.
Original question:
Tool/software: Code Composer Studio
Hi,
We have test the PCIE using two TDA4-EVM boards following the guide:software-dl.ti.com/.../PCIe_End_Point.html
But it failed.Our operation steps are as follows:
1.We made one PCIE connecting cable with only TX and RX.Other signals, power and gnd are all disconnected.
2.We cat the k3-j721e-common-proc-board.dts,it is RC by default so we copy the dtb to RC Board rootfs/boot dir.
3.We edit the k3-j721e-common-proc-board.dts,and copy the dtb to EP Board rootfs/boot dir.
&pcie0_rc {
reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <1>;
status = "disabled";
};
&pcie1_rc {
reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
phys = <&serdes1_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <2>;
status = "disabled";
};
&pcie2_rc {
reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>;
phys = <&serdes2_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <2>;
status = "disabled";
};
&pcie0_ep {
phys = <&serdes0_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <1>;
};
&pcie1_ep {
phys = <&serdes1_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <2>;
status = "disabled";
};
&pcie2_ep {
phys = <&serdes2_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <2>;
status = "disabled";
};
&pcie3_rc {
status = "disabled";
};
&pcie3_ep {
status = "disabled";
};
4.We cat the tisdk_j7-evm_defconfig and don't edit it.So we also copy the Image to EP and RC Board rootfs/boot dir.
CONFIG_PCI_ENDPOINT=y CONFIG_PCI_ENDPOINT_CONFIGFS=y CONFIG_PCI_EPF_TEST=y CONFIG_PCI_J721E=y CONFIG_PCIE_CADENCE_EP=y CONFIG_PCI=y CONFIG_PCI_ENDPOINT_TEST=m CONFIG_PCIE_CADENCE_HOST=y
5.Power on EP and execute the command with using shell script:
mkdir /sys/kernel/config/pci_ep/functions/pci_epf_test/func1 echo 0x104c > /sys/kernel/config/pci_ep/functions/pci_epf_test/func1/vendorid echo 0xb00d > /sys/kernel/config/pci_ep/functions/pci_epf_test/func1/deviceid echo 2 > /sys/kernel/config/pci_ep/functions/pci_epf_test/func1/msi_interrupts echo 2 > /sys/kernel/config/pci_ep/functions/pci_epf_test/func1/msix_interrupts ln -s /sys/kernel/config/pci_ep/functions/pci_epf_test/func1 /sys/kernel/config/pci_ep/controllers/2900000.pcie-ep echo 1 > /sys/kernel/config/pci_ep/controllers/2900000.pcie-ep/start
6.Connect the RC and EP board using the PCIE connecting cable,and Power on the RC.
But after the kernel starts, it fails. Print as follows:
[ 1.510392] j721e-pcie 2900000.pcie: Link up [ 1.514764] j721e-pcie 2900000.pcie: host bridge /bus@100000/pcie@2900000 ranges: [ 1.522424] j721e-pcie 2900000.pcie: IO 0x10001000..0x10010fff -> 0x10001000 [ 1.529903] j721e-pcie 2900000.pcie: MEM 0x10011000..0x17ffffff -> 0x10011000 [ 1.537454] j721e-pcie 2900000.pcie: PCI host bridge to bus 0000:00 [ 1.543862] pci_bus 0000:00: root bus resource [bus 00-0f] [ 1.549466] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] (bus address [0x10001000-0x10010fff]) [ 1.559156] pci_bus 0000:00: root bus resource [mem 0x10011000-0x17ffffff] [ 1.566198] pci 0000:00:00.0: [104c:b00d] type 01 class 0x060400 [ 1.572347] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 1.582216] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 1.592102] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0xe8 may corrupt adjacent RW1C bits [ 1.602061] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x3e may corrupt adjacent RW1C bits [ 1.612027] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x92 may corrupt adjacent RW1C bits [ 1.621986] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0xb2 may corrupt adjacent RW1C bits [ 1.631975] pci 0000:00:00.0: supports D1 [ 1.636068] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 1.641940] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x84 may corrupt adjacent RW1C bits [ 1.653671] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 1.661859] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x3e may corrupt adjacent RW1C bits [ 1.671818] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x3e may corrupt adjacent RW1C bits [ 1.681776] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x3e may corrupt adjacent RW1C bits [ 1.691799] pci 0000:01:00.0: [104c:b00d] type 00 class 0xff0000 [ 1.698004] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000000ff] [ 1.704418] pci 0000:01:00.0: reg 0x14: [mem 0x00000000-0x000001ff] [ 1.710832] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x000003ff] [ 1.717245] pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x00003fff] [ 1.723658] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x0001ffff] [ 1.730071] pci 0000:01:00.0: reg 0x24: [mem 0x00000000-0x000fffff] [ 1.736719] pci 0000:01:00.0: supports D1 [ 1.740813] pci 0000:01:00.0: PME# supported from D0 D1 D3hot [ 1.746754] pci 0000:01:00.0: reg 0x224: [mem 0x00000000-0x003fffff 64bit] [ 1.753779] pci 0000:01:00.0: VF(n) BAR0 space: [mem 0x00000000-0x00ffffff 64bit] (contains BAR0 for 4 VFs) ERROR: Unhandled External Abort received on 0x80000000 from S-EL1 ERROR: exception reason=0 syndrome=0xbf000000 Unhandled Exception from EL1 x0 = 0xffff8000143e0000 x1 = 0x0000000000000000 x2 = 0x000000000080000a x3 = 0x0000000000000003 x4 = 0xffff800014900000 x5 = 0xffff80001050e698 x6 = 0xffff8000117ef8f4 x7 = 0x000000000000ea60 x8 = 0x0000000080b5111d x9 = 0x00000000b00d104c x10 = 0x7f7f7f7f7f7f7f7f x11 = 0x0101010101010101 x12 = 0xffff0008400fe227 x13 = 0xffff0008400fe91c x14 = 0xffffffffffffffff x15 = 0xffff000840372f28 x16 = 0x0000000000000019 x17 = 0x0000000000000001 x18 = 0x0000000000000000 x19 = 0xffff8000117ef834 x20 = 0x0000000000000004 x21 = 0x0000000000000000 x22 = 0x0000000000000004 x23 = 0xffff8000117ef834 x24 = 0x0000000000000001 x25 = 0xffff8000110ee210 x26 = 0x0000000000000001 x27 = 0x0000000000000000 x28 = 0xffff000842182800 x29 = 0xffff8000117ef780 x30 = 0xffff8000104dd7a8 scr_el3 = 0x000000000000073d sctlr_el3 = 0x0000000030cd183f cptr_el3 = 0x0000000000000000 tcr_el3 = 0x0000000080803520 daif = 0x00000000000002c0 mair_el3 = 0x00000000004404ff spsr_el3 = 0x0000000020000085 elr_el3 = 0xffff8000104dd7c0 ttbr0_el3 = 0x0000000070010b00 esr_el3 = 0x00000000bf000000 far_el3 = 0x0000000000000000 spsr_el1 = 0x0000000060000005 elr_el1 = 0xffff800010115b44 spsr_abt = 0x0000000000000000 spsr_und = 0x0000000000000000 spsr_irq = 0x0000000000000000 spsr_fiq = 0x0000000000000000 sctlr_el1 = 0x0000000034d4d91d actlr_el1 = 0x0000000000000000 cpacr_el1 = 0x0000000000300000 csselr_el1 = 0x0000000000000000 sp_el1 = 0xffff8000117ef780 esr_el1 = 0x0000000000000000 ttbr0_el1 = 0x0000000083090000 ttbr1_el1 = 0x0000000082df0000 mair_el1 = 0x0000bbff440c0400 amair_el1 = 0x0000000000000000 tcr_el1 = 0x00000034f5507510 tpidr_el1 = 0xffff80086ebe0000 tpidr_el0 = 0x0000000000000000 tpidrro_el0 = 0x0000000000000000 par_el1 = 0x0000000000000000 mpidr_el1 = 0x0000000080000000 afsr0_el1 = 0x0000000000000000 afsr1_el1 = 0x0000000000000000 contextidr_el1 = 0x0000000000000000 vbar_el1 = 0xffff800010081800 cntp_ctl_el0 = 0x0000000000000005 cntp_cval_el0 = 0x000000005f2deec8 cntv_ctl_el0 = 0x0000000000000000 cntv_cval_el0 = 0x0000000000000000 cntkctl_el1 = 0x00000000000000e6 sp_el0 = 0x000000007000a3d0 isr_el1 = 0x0000000000000040 dacr32_el2 = 0x0000000000000000 ifsr32_el2 = 0x0000000000000000 cpuectlr_el1 = 0x0000001b00000040 cpumerrsr_el1 = 0x0000000000000000 l2merrsr_el1 = 0x0000000000000000
