• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 100 subscribers
  • Views 131 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3356: Oscillator tr/tf specification

g.f.
Guru 15510 points
Part Number: AM3356

Hi,

I have questions about AM3356.

Q1.
In datasheet(SPRS717L) page.112 "Table 6-7. OSC1 LVCMOS Reference Clock Requirements",
5[ns](Max) is requirements for LVCMOS reference clock rise and fall time.
But our customer are saying that they can't find the LVCMOS reference clock product which
meets this requirements.
Does issue will occur if they use the clock which tr/tf are more than 5[ns]?
Or should they use crystal rather than external oscillator?

Q2.
My customer are requesting us the terminal capacity value of XTALIN(OSC0) and RTC_XTALIN(OSC1).
Is it possible to share us the value of above terminal capacity?

best regards,
g.f.

  • 0
    TI__Guru 60955 points

    A maximum rise/fall time value was defined for the oscillator inputs (XTALIN and RTC_XTALIN) to minimize a chance of noise on the reference clock input signal producing a glitch on internal reference clocks.

    A slow voltage change makes it easier for electrical noise to couple into the reference clock signal and produce a non-monatomic transition just as the signal crosses the input buffer switching threshold. If the noise source induces enough potential, the non-monatomic event my exceed the hysteresis of the input buffer which causes it to produces a glitch on the internal reference clock. Several customers using AM335x have experienced this issue when using a crystal circuit as the reference clock source since the reference clock produced by a crystal circuit has a slow rise/fall.

    These glitches commonly caused timers operating from the oscillator clock to suddenly jump forward or backwards in time since the glitch effectively over-clocks the timer logic circuits which allows it to do unpredictable things. However, these glitches have occasionally caused other issues like the PLL suddenly changing its operating frequency.

    The 5ns value was used to be consistent with the maximum rise/fall time defined for many other inputs and is not a firm requirement for this input. However, I would not recommend exceeding a 10ns rise/fall time. They may need to buffer the reference clock signal with a stronger output buffer before connecting it to XTALIN and/or RTC_XTALIN if this is not possible to find a reference clock source with less than 10ns rise/fall. 

    The input capacitance of XTALIN and RTC_XTALIN has not be defined, but expect it to be less than 3pf. I would need to ask the analog design team if a firm value is needed. This question may take a long time to get answered. It would be quicker to verify the rise/fall time by measuring an actual implementation.

    Regards,
    Paul

  • 0 in reply to peaves
    Guru 15510 points

    Hi Paul,

    Thank you for the reply.

    So, if they find the oscillator which max time of tr/tf are less than 10[ns],

    issue will not occur, is it correct?

    best regards,

    g.f.

  • 0 in reply to g.f.
    TI__Guru 60955 points

    I'm not aware of anyone that has experienced the issue described in my previous email when using a 1.8V LVCMOS oscillator to drive these inputs. I have only seen this issue occur when customers were using a crystal. However, there is no way to say for sure this will not occur even when using a reference clock signal with a 5ns rise/fall.

    The probability of it happening decreases significantly as the rise/fall time decreases. There are many system design and environment variables that effect a systems noise immunity. A 5ns rise/fall reference clock signal could still be distorted and cause this issue if the electrical noise source is strong enough. For example, when a system is exposed to the RF field of a powerful transmitter.

    The system designer needs to understand all environmental conditions for which the product will be exposed and verify its operation is robust across all operating conditions. In some cases, understanding the electrical noise environment may be just as important or more important than more common environmental conditions like temperature.

    Regards,
    Paul