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PRU-ICSS-INDUSTRIAL-SW: Speed performance benchmark

Part Number: PRU-ICSS-INDUSTRIAL-SW

Hi,

 I am developing an Ethernet driver for PRU-ICSSG (SR 2.0) using dual mac firmware for AM6548 chip based on a proprietary RTOS.

 I am using the SDK 7.01 based DUAL EMAC firmware from the below source:

 Is there any speed performance benchmark for 1 Gbps and 100 Mbps for the emac Ethernet driver based on SDK 7.01 DUAL EMAC firmware?

 It will be very helpful if you can provide me with some benchmark results so that I can compare with the performance of my Ethernet driver.

Best Regards,

Debarun

  • We are working to get the performance numbers requested.  We will keep you posted.

  • Hi Debarun,

    • Below numbers are obtained using emac-lld driver APIs.
    • Here, our device is termed as DUT (device under test).

    For DUT Tx benchmark:

    DUT sending frames on both ports simultaneously. External frame receiver/analyzer giving below number:

    Frame

    64B BC frames

    1518B BC frames

     DUT Tx speed

    ~38.3 Mbps

    ~237 Mbps

    For DUT Rx benchmark:

    External frame transmitter is set to send frames with IPG = 12B on both ports of DUT simultaneously.

    Frame

    64B DUC frames

    64B BC frames

    1518B DUC frames

    1518B BC frames

    DUT Rx Speed

    ~8.5 Mbps

    ~7.73 Mbps

    ~720 Mbps

    ~ 719 Mbps

     

    Best Regards

    Ashwani

  • If we set UC/BC/MC ingress rate limiter = 200 Mbps. Then got below numbers for DUT Rx Tx performance.

     

    Frame

    64B BC frames

    1518B BC frames

    Port used

    Both ports simultaneously

    Both ports simultaneously

    DUT Tx speed

    ~38.3 Mbps

    ~235 Mbps

    DUT Rx speed

    ~36.3 Mbps

    ~200 Mbps

    Best Regards

    Ashwani

  • Hi Ashwani,

      Thank you for the report! It is really helpful!

       I have few queries:

    1. In the previous post where the RX speeds is ~719 Mbps, is there any network stack involved? Or the packet is received by from LLD and performance is measured with no processing at the protocol layers? And also I think the program runs on MSMC SRAM, is it right?

    2. For the ingress rate limiter, I do not think it is enabled by default in the emac code, is my understanding correct? I am getting RX throughput of about 420 Mbps for my ethernet driver (UDP packets). The register settings are based on the emac LLD code.

    Best Regards,

    Debarun

  • Hi Debarun,

    Please find inline reply.

    1. In the previous post where the RX speeds is ~719 Mbps, is there any network stack involved?

    TI: No, There is no stack involved while getting performance numbers on our side.

    2. The packet is received by from LLD and performance is measured with no processing at the protocol layers.

    TI: Yes.

    3. And also I think the program runs on MSMC SRAM, is it right?

    TI: Right.

    4. For the ingress rate limiter, I do not think it is enabled by default in the emac code, is my understanding correct?

    TI: Correct.

    Best Regards

    Ashwani

  • Hi Ashwani,

      Thank you so much for your reply. I am obliged!

      I have one more request. Do you have any speed performance benchmark for TCP TX and RX for 100 Mbps Half Duplex? The performance is lower than expected for this combination. Throughput for other speed duplex settings seems to be as expected.

    Best Regards,

    Debarun

  • Hi Debarun,

     We do not support 100M/1G Half duplex in FW and its not tested.

    Still, we want to understand your use case. Can you please provide some details as ?

    1. What is your test setup
    2. Steps you are performing and
    3. Expected results

    Best Regards

    Ashwani

  • Hi Ashwani,

      Sorry for my late reply.

      Below are the details of the tests performed:

    1. The Board (IP 192.168.8.10) is connected directly to Host PC (IP 192.168.8.2). The link speed is negotiated to 100 Mbps Half Duplex.

    2. A throughput measuring application runs on the board and as well as on the Host PC. For TX performance the board sends packets and are received by the Host PC and the throughput is measured on the Host PC size as the total bytes received/total time taken, and for RX the Host PC sends packets and the board receives the packets and throughput is measured.

    3. For 100 Mbps Full Duplex, the TX throughput is about 94 Mbps and RX throughput is also about 94 Mbps.

        But for 100 Mbps Half Duplex, the TX throughput is ~10 Mbps and RX throughput is ~6 Mbps. This is very low.

       From the wireshark captures, it can be observed, that for Half Duplex the board seems to be sending out duplicate packets and causing TCP retransmission (observed for both TX and RX). However, for Full Duplex the capture is clean and there are no retransmissions observed. You can download the captures from the below link:

    https://drive.google.com/file/d/1L4dGFPmJ_jhQRYvJTXtDS3hO1Z3pC_p1/view?usp=sharing

    There are 4 captures in the above link below are the details:

    TCP_RX_100_FULL.pcapng -> Capture for TCP RX throughput for 100 Mbps Full Duplex

    TCP_TX_100_FULL.pcapng -> Capture for TCP TX throughput for 100 Mbps Full Duplex

    TCP_RX_100_HALF.pcapng -> Capture for TCP RX throughput for 100 Mbps Half Duplex

    TCP_TX_100_HALF.pcapng -> Capture for TCP TX throughput for 100 Mbps Full Duplex

    The speed/duplex configuration for the driver is same as done for emac LLD.

     Please let me know your feedback and any other information that you require.

    Best Regards,

    Debarun

  • Hi Ashwani, 

      Thank you for your reply.

      It will be very helpful if you please kindly let us know your feedback on the above (whether there is any restrictions in 100 Mbps half/duplex, etc). My client requires higher throughput for 100 Mbps half duplex, so the appropriate reason and the fix needs to be identified.

     

      Thanking you in advance for all your help.

    Best Regards,

    Debarun

  • Hi Debarun,

    We are working on this internally with priority. I will get back to as soon as I get something on this.

    Thanks & Regards

    Ashwani

  • Hi Ashwani,

      Thank you for your help, I am obliged!

      One piece of information, my Ethernet driver code does not perform the below configuration of the firmware (which is done by EMAC LLD):

    /* Enable PA_STAT block for diagnostic counters in ICSSG */
    regVal = (uint32_t)(1U << 31U) | 2U; //Enable stats block, 2 vi
    HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PA_STAT_WRAP_PA_SLV_REGS_BASE + 8U,regVal);

     However, to confirm, I had added this configuration, but found that there was no effect on the performance of 100 Mbps Half Duplex.

    Thanks and regards,

    Debarun

  • Hi Debarun,

    This piece of code is just enabling PA-STATS (statistics counters). It is not expected to have any effect on 100M half duplex performance.

    Half duplex support requires FW changes (planned in June SDK release) and HW changes to connect COL signal from PHY to MII_COL signal of ICSS.

    Best Regards

    Ashwani

  • Hi Ashwani,

      Thank you for the information! It is really helpful!

      I will convey this information to my client.

    Best Regards,

    Debarun