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Frequent questions

  • [FAQ] Important Notice for Support transition for AM68/AM68A and AM69/AM69A devices

    Part Number: AM68 Other Parts Discussed in Thread: AM69A , TDA4VL , TDA4VH , AM69 To ensure the long-term success of customer designs, TI is evolving our support model for the AM68 / AM68A and AM69 / AM69A products. We are excited to deepen our collaboration…

  • [FAQ] TDA4VL-Q1: How can I port a C7x algorithm using Code Composer Studio?

    Part Number: TDA4VL-Q1 Hi Team, Could you please explain the steps for creating a CCS workspace for C7x development, and provide an example? Regards, Betsy Varughese

  • [FAQ] AM62L: Printing Addresses while booting in Linux

    Part Number: AM62L I want to be able to print the MMC 2 Addresses before and after a code block to check what are the changes that have been made by that code block. What is the process to do this?

  • [FAQ] AM62x, AM62Ax, AM62D-Q1, AM62P, AM62L, AM64x, AM243x: Compare OSPI Registers

    Part Number: AM625 Context: In MCU+ SDK and MCAL SDK, often while debugging OSPI & FLASH related failures, we come at a stage where comparing the OSPI Controller Register helps us debug faster. Comparing each register and their respective bit fields…

  • [FAQ] J721S2: How to Enable HSM Boot Using eMMC UDA Partition on HS Device

    Part Number: TDA4VM By default, the SBL does not support HSM boot when using eMMC UDA (User Data Area) partition on High Security (HS) devices. The HSM boot support was only available for MMCSD, OSPI NOR, OSPI NAND, and UART boot modes.

  • [FAQ] AM67A, AM67 Custom board hardware design – Collaterals to Get started

    Part Number: AM67A Other Parts Discussed in Thread: TDA4VM , TDA4VL , AM68 , DRA821 , AM69 , TDA4VH , AM67 , , LMK3H0102 , AM62P Hi TI Experts, Can you provide a List of collaterals and E2E that can be referred when starting a custom board hardware…

  • [FAQ] TDA4VE-Q1: SBL HLOS Boot Test Procedure for Combined AppImage

    Part Number: TDA4VE-Q1 Hi, Is there a recommended procedure to run an HLOS on the A72 cores while running firmware on the R5 and DSP cores?

  • [FAQ] Binary blob authentication and decryption using TIFS on AM62x

    Part Number: AM625 SYSFW/TIFS supports binary blob verification and decryption on AM6xx family SoC (HS-SE). https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/authentication.html The FAQ lists how to call the TISCI API TISCI_MSG_PROC_AUTH_BOOT…

  • [FAQ] TDA4AH-Q1: How to Generate an Assembly file and perform analysis

    Part Number: TDA4VH-Q1 Hi Team, How can I generate an assembly file from C7x code and calculate the total cycle count using the software pipeline information found in the assembler file? Regards, Betsy Varughese

  • [FAQ] AM2754-Q1: [FAQ] Mcasp signal placement order in buffer for multiple serializers and multiple channels/slots

    Part Number: AM2754-Q1 Other Parts Discussed in Thread: SYSCONFIG , TAD5212 Mcasp buffer order To be short, in case of multiple serializers used in one Mcasp, the samples are placed interleaved by slot not frame by default. (Please check the "12.1…

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