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Part Number: AM625 Other Parts Discussed in Thread: AM62P , AM62L
Overview
This article describes how to build and boot DFU enabled U-boot images on TI-K3 devices such as AM62X, AM62A AM62P, AM62L and AM64L using Yocto
USB-DFU (Device Firmware Upgrade…
Part Number: AM2434
On HSSE devices, the SYSFW supports the Keyring feature which extends the Root of Trust ( RoT ) to auxiliary keys. This enables the authentication of the application images using these auxiliary keys apart from the programmed SMPKH…
Part Number: AM62x Other Parts Discussed in Thread: UNIFLASH , AM62P
The UART UNIFLASH tool provided in the MCU+SDK will only work for TI EVMs out of the box as it is configured according to Flash and DDR part used in a particular EVM, this FAQ provides…
Part Number: AM62P Other Parts Discussed in Thread: UNIFLASH
Default MCU+SDK SBL examples only support booting from a single boot media (SBL OSPI/SBL EMMC), this FAQ demonstrates how to modify the SBL example to support booting from different boot medias…
Part Number: TDA4VL-Q1
Hello Team,
I am looking for guidance on how to build and run the PDK FreeRTOS example applications .
Specifically, I would appreciate clarification on the following points:
The correct steps to build the PDK FreeRTOS…
Part Number: AM625
DDR ECC [1] on the TI AM62x SoC operates using an inline ECC mechanism. Unlike traditional server-grade systems that require a dedicated 9th memory chip, the AM62x stores Error Correction Code (ECC) data directly within the standard…
Part Number: TDA4AEN-Q1 Other Parts Discussed in Thread: SYSCONFIG
The reason behind craeating 2 different nodes for csitx is to transmit frames with different format/resolution on the same csitx instance.
Part Number: TDA4AEN-Q1 Other Parts Discussed in Thread: SYSCONFIG , , UNIFLASH
The J722S TRM incorrectly states that GPIO1_52 through GPIO1_71 do not support interrupt functionality.
In reality, these pins do have interrupt capability but require…
Part Number: TDA4VH-Q1
I'm looking for detailed information on what memories each PBIST instance performs positive and negative selftest on. All instances don't have same kind of memories. So, I would like to understand what each instance specifically…
