RTOS/TMDXICE110: Enabling second I2C in Profinet

Frank Brütting

Part Number: TMDXICE110
Other Parts Discussed in Thread: AMIC110, AM3359

Tool/software: TI-RTOS

Hi,

for some days I now try to get a second I²C module working in our Profinet project. We like to use the second module "I2C1" on pins E17 and E18 (pinmode 3).

I always read that we should use the PINMUX tool and a corresponding ".pinmux" file. But neither does that example have a "*.pinmux" file, nor does the SDK have one for the "iceAMIC110". The SDK file "am335x_amic11x_pinmux_data.c" – which states that it is auto-created by TI PinMux and seems to be used in that example – is also not importable into the PINMUX tool.
Why is Starterware necessary for that process? I didn’t need starterware for doing my SPI stuff, for example. It’s really hard to understand how this is handled and also the file "starterware/board/am335x/am335x_amic110.c" contains stuff for an I2C rotary switch – which isn’t even on the board…?!

I now tried to edit that "am335x_amic11x_pinux_data.c" file by hand, I removed the Ethercat-related code of the two pins E17 and E18 (those pins actually should be implemented in some generic way, as it’s not possible for me to tell if they’re actually used by Profinet or not) and added code for a second I²C module (`gI2c1PinCfg[]` / `gI2cPinCfg[]`), like it’s done in the MCSPI code below that. [Here is my file:

am335x_amic11x_pinmux_data.c

/**
 * Note: This file was auto-generated by TI PinMux on 3/16/2017 at 12:53:28 AM.
 *
 * \file  amic11x_pinmux_data.c
 *
 * \brief  This file contains the pin mux configurations for the boards.
 *         These are prepared based on how the peripherals are extended on
 *         the boards.
 *
 * \copyright Copyright (CU) 2017 Texas Instruments Incorporated -
 *             http://www.ti.com/
 */

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
#include "types.h"
#include "pinmux.h"
#include "am335x_pinmux.h"

/** Peripheral Pin Configurations */

#ifndef BUILDCFG_MOD_ADC
#define BUILDCFG_MOD_ADC
#endif /* BUILDCFG_MOD_ADC */

#ifndef BUILDCFG_MOD_PRU_ICSS
#define BUILDCFG_MOD_PRU_ICSS
#endif /* BUILDCFG_MOD_PRU_ICSS */

#ifndef BUILDCFG_MOD_I2C
#define BUILDCFG_MOD_I2C
#endif /* BUILDCFG_MOD_I2C */

#ifndef BUILDCFG_MOD_MCSPI
#define BUILDCFG_MOD_MCSPI
#endif /* BUILDCFG_MOD_MCSPI */

#ifndef BUILDCFG_MOD_GPIO
#define BUILDCFG_MOD_GPIO
#endif /* BUILDCFG_MOD_GPIO */

#ifndef BUILDCFG_MOD_MCASP
#define BUILDCFG_MOD_MCASP
#endif /* BUILDCFG_MOD_MCASP */

#ifndef BUILDCFG_MOD_GLUE
#define BUILDCFG_MOD_GLUE
#endif /* BUILDCFG_MOD_GLUE */

#ifndef BUILDCFG_MOD_EMIF
#define BUILDCFG_MOD_EMIF
#endif /* BUILDCFG_MOD_EMIF */

#ifndef BUILDCFG_MOD_UART
#define BUILDCFG_MOD_UART
#endif /* BUILDCFG_MOD_UART */

#ifndef BUILDCFG_MOD_OSC
#define BUILDCFG_MOD_OSC
#endif /* BUILDCFG_MOD_OSC */

#ifndef BUILDCFG_MOD_RTC
#define BUILDCFG_MOD_RTC
#endif /* BUILDCFG_MOD_RTC */

#ifndef BUILDCFG_MOD_DEBUGSS
#define BUILDCFG_MOD_DEBUGSS
#endif /* BUILDCFG_MOD_DEBUGSS */

#if defined(BUILDCFG_MOD_ADC)

static pinmuxPerCfg_t gAdc0PinCfg[] =
{
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gAdcPinCfg[] =
{
    {0, TRUE, gAdc0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_ADC) */

#if defined(BUILDCFG_MOD_PRU_ICSS)

static pinmuxPerCfg_t gPru_icss1PinCfg[] =
{
    {
       /* MDIO_PRUSS1 -> pr1_mdio_mdclk -> V12 */
       PIN_GPMC_CLK, (uint16_t)PINMUX_SS_PRU_ICSS_MDIO, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MDIO_PRUSS1 -> pr1_mdio_data -> T13 */
       PIN_GPMC_CSN3, (uint16_t)PINMUX_SS_PRU_ICSS_MDIO, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii_mt0_clk -> R1 */
       PIN_LCD_DATA0, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_txd0 -> T2 */
       PIN_LCD_DATA5, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_txd1 -> T1 */
       PIN_LCD_DATA4, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_txd2 -> R4 */
       PIN_LCD_DATA3, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_txd3 -> R3 */
       PIN_LCD_DATA2, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxd0 -> U4 */
       PIN_LCD_DATA11, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxd1 -> U3 */
       PIN_LCD_DATA10, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxd2 -> U2 */
       PIN_LCD_DATA9, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxd3 -> U1 */
       PIN_LCD_DATA8, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_txen -> R2 */
       PIN_LCD_DATA1, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii_mr0_clk -> V4 */
       PIN_LCD_DATA14, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxdv -> T5 */
       PIN_LCD_DATA15, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxer -> V3 */
       PIN_LCD_DATA13, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_rxlink -> V2 */
       PIN_LCD_DATA12, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_crs -> V5 */
       PIN_LCD_PCLK, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII0_PRUSS1 -> pr1_mii0_col -> T10 */
       PIN_GPMC_AD9, (uint16_t)PINMUX_SS_PRU_ICSS_MII0, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii_mt1_clk -> R13 */
       PIN_GPMC_A0, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_txd0 -> R14 */
       PIN_GPMC_A4, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_txd1 -> T14 */
       PIN_GPMC_A3, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_txd2 -> U14 */
       PIN_GPMC_A2, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_txd3 -> V14 */
       PIN_GPMC_A1, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxd0 -> V16 */
       PIN_GPMC_A8, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxd1 -> T15 */
       PIN_GPMC_A7, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxd2 -> U15 */
       PIN_GPMC_A6, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxd3 -> V15 */
       PIN_GPMC_A5, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_txen -> U17 */
       PIN_GPMC_WPN, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii_mr1_clk -> U16 */
       PIN_GPMC_A9, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxdv -> T16 */
       PIN_GPMC_A10, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxer -> V17 */
       PIN_GPMC_A11, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_rxlink -> U18 */
       PIN_GPMC_BE1N, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_crs -> R6 */
       PIN_LCD_AC_BIAS_EN, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MII1_PRUSS1 -> pr1_mii1_col -> T17 */
       PIN_GPMC_WAIT0, (uint16_t)PINMUX_SS_PRU_ICSS_MII1, \
       ( \
           PIN_MODE(5) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* eCAP0_PRUSS1 -> pr1_ecap0_ecap_capin_apwm_o -> C18 */
       PIN_ECAP0_IN_PWM0_OUT, (uint16_t)PINMUX_SS_PRU_ICSS_ECAP0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
/*    {
       // ECAT_PRUSS1 -> pr1_edc_sync0_out -> E18
       PIN_UART0_CTSN, (uint16_t)PINMUX_SS_PRU_ICSS_ECAT, \
       ( \
           PIN_MODE(6) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       // ECAT_PRUSS1 -> pr1_edc_sync1_out -> E17
       PIN_UART0_RTSN, (uint16_t)PINMUX_SS_PRU_ICSS_ECAT, \
       ( \
           PIN_MODE(6) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
*/    {
       // ECAT_PRUSS1 -> pr1_edc_latch0_in -> D18
       PIN_UART1_CTSN, (uint16_t)PINMUX_SS_PRU_ICSS_ECAT, \
       ( \
           PIN_MODE(6) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* ECAT_PRUSS1 -> pr1_edc_latch1_in -> D17 */
       PIN_UART1_RTSN, (uint16_t)PINMUX_SS_PRU_ICSS_ECAT, \
       ( \
           PIN_MODE(6) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gPru_icssPinCfg[] =
{
    {1, TRUE, gPru_icss1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_PRU_ICSS) */






#if defined(BUILDCFG_MOD_I2C)

static pinmuxPerCfg_t gI2c0PinCfg[] =
{
    {
       // I2C0 -> I2C0_SCL -> C16
       PIN_I2C0_SCL, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       // I2C0 -> I2C0_SDA -> C17
       PIN_I2C0_SDA, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gI2c1PinCfg[] =
{
    {
       // E18: I2C1_SDA															// HIER GEÄNDERT
       PIN_UART0_CTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       // E17: I2C1_SCL															// HIER GEÄNDERT
       PIN_UART0_RTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gI2cPinCfg[] =
{
    {0, TRUE, gI2c0PinCfg},
	{1, TRUE, gI2c1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_I2C) */








#if defined(BUILDCFG_MOD_MCSPI)

static pinmuxPerCfg_t gMcspi0PinCfg[] =
{
    {
       /* SPI0_flash -> spi0_sclk -> A17 */
       PIN_SPI0_SCLK, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI0_flash -> spi0_d0 -> B17 */
       PIN_SPI0_D0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI0_flash -> spi0_d1 -> B16 */
       PIN_SPI0_D1, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* SPI0_flash -> spi0_cs0 -> A16 */
       PIN_SPI0_CS0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* SPI0_flash -> spi0_cs1 -> C15 */
       PIN_SPI0_CS1, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gMcspi1PinCfg[] =
{
    {
       /* SPI1_launchpad -> spi1_sclk -> H16 */
       PIN_GMII1_COL, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI1_launchpad -> spi1_d0 -> H17 */
       PIN_GMII1_CRS, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI1_launchpad -> spi1_d1 -> J15 */
       PIN_GMII1_RXER, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI1_launchpad -> spi1_cs0 -> H18 */
       PIN_RMII1_REFCLK, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gMcspiPinCfg[] =
{
    {0, TRUE, gMcspi0PinCfg},
    {1, TRUE, gMcspi1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_MCSPI) */

#if defined(BUILDCFG_MOD_GPIO)

static pinmuxPerCfg_t gGpio3PinCfg[] =
{
    {
       /* GPIO3 -> gpio3[9] -> K18 */
       PIN_GMII1_TXCLK, 9, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO3 -> gpio3[16] -> D12 */
       PIN_MCASP0_AXR0, 16, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO3 -> gpio3[17] -> C12 */
       PIN_MCASP0_AHCLKR, 17, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO3 -> gpio3[18] -> B12 */
       PIN_MCASP0_ACLKR, 18, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO3 -> gpio3[19] -> C13 */
       PIN_MCASP0_FSR, 19, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO3 -> gpio3[20] -> D13 */
       PIN_MCASP0_AXR1, 20, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gGpio0PinCfg[] =
{
    {
       /* GPIO0 -> gpio0[16] -> J18 */
       PIN_GMII1_TXD3, 16, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> gpio0[17] -> K15 */
       PIN_GMII1_TXD2, 17, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> gpio0[19] -> A15 */
       PIN_XDMA_EVENT_INTR0, 19, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> gpio0[20] -> D14 */
       PIN_XDMA_EVENT_INTR1, 20, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> gpio0[27] -> U12 */
       PIN_GPMC_AD11, 27, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gGpio1PinCfg[] =
{
    {
       /* GPIO1 -> gpio1[1] -> V7 */
       PIN_GPMC_AD1, 1, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> gpio1[12] -> T12 */
       PIN_GPMC_AD12, 12, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> gpio1[13] -> R12 */
       PIN_GPMC_AD13, 13, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> gpio1[14] -> V13 */
       PIN_GPMC_AD14, 14, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> gpio1[15] -> U13 */
       PIN_GPMC_AD15, 15, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> gpio1[30] -> U9 */
       PIN_GPMC_CSN1, 30, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gGpio2PinCfg[] =
{
    {
       /* GPIO2 -> gpio2[12] -> T3 */
       PIN_LCD_DATA6, 12, \
       ( \
           PIN_MODE(7) | \
           ((PIN_RX_ACTIVE) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO2 -> gpio2[13] -> T4 */
       PIN_LCD_DATA7, 13, \
       ( \
           PIN_MODE(7) | \
           ((PIN_RX_ACTIVE) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO2 -> gpio2[18] -> L17 */
       PIN_GMII1_RXD3, 18, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO2 -> gpio2[19] -> L16 */
       PIN_GMII1_RXD2, 19, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO2 -> gpio2[21] -> M16 */
       PIN_GMII1_RXD0, 21, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO2 -> gpio2[27] -> F18 */
       PIN_MMC0_DAT2, 27, \
       ( \
           PIN_MODE(7) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gGpioPinCfg[] =
{
    {3, TRUE, gGpio3PinCfg},
    {0, TRUE, gGpio0PinCfg},
    {1, TRUE, gGpio1PinCfg},
    {2, TRUE, gGpio2PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_GPIO) */

#if defined(BUILDCFG_MOD_MCASP)

static pinmuxPerCfg_t gMcasp1PinCfg[] =
{
    {
       /* MCASP1_launchpad -> mcasp1_aclkr -> K17 */
       PIN_GMII1_TXD0, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MCASP1_launchpad -> mcasp1_fsr -> L15 */
       PIN_GMII1_RXD1, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MCASP1_launchpad -> mcasp1_axr0 -> J16 */
       PIN_GMII1_TXEN, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MCASP1_launchpad -> mcasp1_axr1 -> K16 */
       PIN_GMII1_TXD1, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gMcaspPinCfg[] =
{
    {1, TRUE, gMcasp1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_MCASP) */

#if defined(BUILDCFG_MOD_GLUE)

static pinmuxPerCfg_t gGlue0PinCfg[] =
{
    {
       /* GLUE -> nRESETIN_OUT -> A10 */
       PIN_NRESETIN_OUT, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GLUE -> nNMI -> B18 */
       PIN_NNMI, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gGluePinCfg[] =
{
    {0, TRUE, gGlue0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_GLUE) */

#if defined(BUILDCFG_MOD_EMIF)

static pinmuxPerCfg_t gEmif4PinCfg[] =
{
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gEmifPinCfg[] =
{
    {4, TRUE, gEmif4PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_EMIF) */

#if defined(BUILDCFG_MOD_UART)

static pinmuxPerCfg_t gUart0PinCfg[] =
{
    {
       /* UART0_console -> uart0_rxd -> E15 */
       PIN_UART0_RXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* UART0_console -> uart0_txd -> E16 */
       PIN_UART0_TXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gUart1PinCfg[] =
{
    {
       /* UART1_launchpad -> uart1_rxd -> D16 */
       PIN_UART1_RXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* UART1_launchpad -> uart1_txd -> D15 */
       PIN_UART1_TXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gUartPinCfg[] =
{
    {0, TRUE, gUart0PinCfg},
    {1, TRUE, gUart1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_UART) */

#if defined(BUILDCFG_MOD_OSC)

static pinmuxPerCfg_t gOsc0PinCfg[] =
{
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gOscPinCfg[] =
{
    {0, TRUE, gOsc0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_OSC) */

#if defined(BUILDCFG_MOD_RTC)

static pinmuxPerCfg_t gRtc0PinCfg[] =
{
    {
       /* RTC -> RTC_PORz -> B5 */
       PIN_RTC_PORZ, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* RTC -> EXT_WAKEUP -> C5 */
       PIN_EXT_WAKEUP, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* RTC -> PMIC_POWER_EN -> C6 */
       PIN_PMIC_POWER_EN, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* RTC -> ENZ_KALDO_1P8V -> B4 */
       PIN_ENZ_KALDO_1P8V, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gRtcPinCfg[] =
{
    {0, TRUE, gRtc0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_RTC) */

#if defined(BUILDCFG_MOD_DEBUGSS)

static pinmuxPerCfg_t gDebugss0PinCfg[] =
{
    {
       /* JTAG -> TMS -> C11 */
       PIN_TMS, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> TDI -> B11 */
       PIN_TDI, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> TDO -> A11 */
       PIN_TDO, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL & ~PIN_RX_ACTIVE)) \
       ) \
    },
    {
       /* JTAG -> TCK -> A12 */
       PIN_TCK, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> nTRST -> B10 */
       PIN_NTRST, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> EMU0 -> C14 */
       PIN_EMU0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> EMU1 -> B14 */
       PIN_EMU1, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* JTAG -> EMU4 -> A14 */
       PIN_MCASP0_AHCLKX, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN | PIN_RX_ACTIVE) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gDebugssPinCfg[] =
{
    {0, TRUE, gDebugss0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_DEBUGSS) */

pinmuxBoardCfg_t gAMIC11xPinmuxData[] =
{
#if defined(BUILDCFG_MOD_ADC)
    {CHIPDB_MOD_ID_ADC, gAdcPinCfg},
#endif /* if defined(BUILDCFG_MOD_ADC) */
#if defined(BUILDCFG_MOD_PRU_ICSS)
    {CHIPDB_MOD_ID_PRU_ICSS, gPru_icssPinCfg},
#endif /* if defined(BUILDCFG_MOD_PRU_ICSS) */
#if defined(BUILDCFG_MOD_I2C)
    {CHIPDB_MOD_ID_I2C, gI2cPinCfg},
#endif /* if defined(BUILDCFG_MOD_I2C) */
#if defined(BUILDCFG_MOD_MCSPI)
    {CHIPDB_MOD_ID_MCSPI, gMcspiPinCfg},
#endif /* if defined(BUILDCFG_MOD_MCSPI) */
#if defined(BUILDCFG_MOD_GPIO)
    {CHIPDB_MOD_ID_GPIO, gGpioPinCfg},
#endif /* if defined(BUILDCFG_MOD_GPIO) */
#if defined(BUILDCFG_MOD_MCASP)
    {CHIPDB_MOD_ID_MCASP, gMcaspPinCfg},
#endif /* if defined(BUILDCFG_MOD_MCASP) */
#if defined(BUILDCFG_MOD_GLUE)
    {CHIPDB_MOD_ID_GLUE, gGluePinCfg},
#endif /* if defined(BUILDCFG_MOD_GLUE) */
#if defined(BUILDCFG_MOD_EMIF)
    {CHIPDB_MOD_ID_EMIF, gEmifPinCfg},
#endif /* if defined(BUILDCFG_MOD_EMIF) */
#if defined(BUILDCFG_MOD_UART)
    {CHIPDB_MOD_ID_UART, gUartPinCfg},
#endif /* if defined(BUILDCFG_MOD_UART) */
#if defined(BUILDCFG_MOD_OSC)
    {CHIPDB_MOD_ID_OSC, gOscPinCfg},
#endif /* if defined(BUILDCFG_MOD_OSC) */
#if defined(BUILDCFG_MOD_RTC)
    {CHIPDB_MOD_ID_RTC, gRtcPinCfg},
#endif /* if defined(BUILDCFG_MOD_RTC) */
#if defined(BUILDCFG_MOD_DEBUGSS)
    {CHIPDB_MOD_ID_DEBUGSS, gDebugssPinCfg},
#endif /* if defined(BUILDCFG_MOD_DEBUGSS) */
    {CHIPDB_MOD_ID_INVALID}
};

]

After editing that file, I tried to make use of that new module by including `PRCMModuleEnable (CHIPDB_MOD_ID_I2C, 1U, 0U);` and `PINMUXModuleConfig (CHIPDB_MOD_ID_I2C, 1U, NULL);` into my application code, which both return without errors. But `I2C_open ()` afterwards fails every time.
How should anyone tell, when to use "[…]/starterware/board/" files and when to use "[<PDK>]/board/" code? For some reason, the example uses the Starterware stuff (at least to some extent?). But why does also the PDK board abstractions exist? As far as I understand, Starterware is a deprecated SDK – but then why is the current Profinet example of the new AMIC processor partly based on the new PDK and partly based on the deprecated Starterware?
Could someone please give me some guidance in how to get a second I²C instance to work on the iceAMIC110 board?
I’d like to not having to rebuild the SDK or create a new board abstraction, but instead include that code part into the project, so that my colleagues don’t have to make changes to the SDK, just for enabling an additional module on a device.
The Profinet example also imports "soc_am335x/I2C_soc.c" from the SDK ["<PDK>/packages/ti/drv/i2c/soc/am335x/I2C_soc.c"] with functions `I2C_socSetInitCfg ()` and `I2C_socGetInitCfg ()`, but these aren’t used anywhere. Why are files like these imported in the project, and should these maybe used? I assume that these are driver-interal and don’t understand why these are pulled into the project.

over 6 years ago

0 Biser Gatchev-XID over 6 years ago

TI__Guru**** 393215 points

The RTOS team have been notified. They will respond here.

0 Garrett Ding over 6 years ago in reply to Biser Gatchev-XID

TI__Mastermind 43296 points

Frank,

- The pinmux config file iceamic11x_config should hep if you want to continue the Pinmux approach which would require rebuild the SDK. The file is located in pdk_am335x_1_0_9\packages\ti\starterware\tools\pinmux_config\am335x\. You can import the file into Pinmux tool.

- Starterware is deprecated from Processor SDK for AM57x device, but still used in some legacy device like AM335x based product. I2C rotary switch definition should be copied from AM3359 board, and need be removed for AMIC110 ICE.

- The `gI2c1PinCfg[]` / `gI2cPinCfg[]`in your file looks fine to me, will confirm with hardware team for the pull up/down and slew rate settings.

- You may have to rebuild the I2C driver with debug mode or add ti\drv\i2c\src\v0\I2C_v0.c in your project and trace into where the failure happens.

- Agree it's a bit complex to include the starterware board files for the PDK board library of new AMIC device and Profinet example.

- Is the second I2C device address configured properly? Below is from starterware\board\board_priv.h:

/** \brief I2C address of the EEPROM. */

#define BOARD_EEPROM_I2C_ADDR_0 (0x50U)

/** \brief I2C address of the LED. */

#define BOARD_LED_I2C_ADDR_2 (0x60U)

- You can configure the 2nd I2C pin mode after Board_init() without rebuilding SDK. Essentially you need to configure the control module register starting from 0x44E1_0000 with offset

968h conf_uart0_ctsn Section 9.3.1.50

96Ch conf_uart0_rtsn Section 9.3.1.50

- The I2C_soc.c should be imported in the project due to some link issue while building the project for AM335x. There are files shared in AMIC110 and AM335x project so you may see some unused functions.

Regards,

Garrett

0 Frank Brütting over 6 years ago in reply to Garrett Ding

Intellectual 270 points

Hi Garrett,

I’m totally confused. Am I able to use `ti/drv/i2c`, or am I not able to use it and have to use `ti/starterware/<i2c-stuff>` instead? The thing is:
• you mention `ti\drv\i2c\src\v0\I2C_v0.c`,
• but `I2C_soc.h` states that AM335x devices include `<ti/drv/i2c/soc/I2C_v1.h>` via an `#if defined(…) #else <…>` clause,
• `I2C.h` states that "Currently the following I2C peripheral implementations are supported: I2C_v1.h",

• and `I2C_v1.h` states: “I2C driver implementation for a __am57x___ I2C controller”.

Everything here is in total opposition to each other. Should I now use v0 or v1 or nothing of `/ti/drv/i2c/` and instead just the starterware headers and functions?

Or do I have to use the current drivers and starterware in parallel, as you mentioned parts of both?

Which “Section 9.3.1.50” are you referring to?

And I don’t mean the second I²C device (like I2C0-EEPROM or I2C0-LED), but instead the second module (I think you call it instance) (which is I2C1). That module is not wired to any I2C devices on the board and we want to connect something external via the Launchpad headers to it.

Would you be so kind and provide some minimal code example (after `Board_init ()`)? For:

• <Instanciating I2C1 instance> (because that isn’t part of the PINMUX file.)

• There is `PINMUXModuleConfig ()` and `PRCMModuleEnable ()`. Do I need both? If yes, in which order? Or is `PINMUXModuleConfig ()` just usable in conjunction with files of the PINMUX tool (and a rebuilt SDK)?

• <Apply pinmode settings> (is there a function for editing pinmode, or do the registers have to be edited raw? I know there is the again “deprecated macro” `HWREG ()`, but I don’t know which values to set for a specific pinmode. Is there some documentation? I guess there is some OR’ing to do, because the SPI example also specified some “latch0” mode for `UART1_CTSn` via the same procedure.)

• <Other settings to be done before opening the driver>

0 Garrett Ding over 6 years ago in reply to Frank Brütting

TI__Mastermind 43296 points

Frank,

It's v1 in `/ti/drv/i2c/'. I was looking into src_files_common.mk and pasted I2C_v0.c. It's really confusing about the v0/v1 files. The easiest way is to open the project map file and look for I2C functions, e.g. I2C_open_v1, to figure out the v0/v1. I will create a ticket to request cleaning up the comments in the driver code.

I was referring to "Section 9.3.1.50" in 'AM335x and AMIC110 Sitara™ Processors Technical Reference Manual', SPRUH73P.

I don't think we have an existing example code for I2C1 and the approach to update pin mux out of pinmux file. I am looping in more folks to comment on this:

For instanciating I2C1 instance, refer to software-dl.ti.com/.../Device_Drivers.html, where peripheralNum (=1) should be referred to I2C1.

You should just need PRCMModuleEnable (). Yes, `PINMUXModuleConfig ()` is just usable in conjunction with files of the PINMUX tool (and a rebuilt SDK).

Pin mode setting is described in Table 4-4. Pin Attributes of AMIC110 data sheet, SPRS971B. Search for pin 'E17' for example.

Regards,
Garrett

0 Frank Brütting over 6 years ago in reply to Garrett Ding

Intellectual 270 points

Hi Garrett,

thank you VERY much, this solved my problem. In the end it wasn’t difficult at all – the problem just was, that it was hard to understand what to do. Would be nice if this could be documented more clearly in the future.

Best regards,
Frank

0 Garrett Ding over 6 years ago in reply to Frank Brütting

TI__Mastermind 43296 points

Hi Frank,

Glad to know the issue has been resolved. Understood the challenges - it's difficult to extract the useful information from the large piece of code/manuals and put it in order. We have been trying to analyze the e2e threads and document FAQs in application notes. The thread regarding PINMUX change on the fly and enabling second I2C instance should be one topic of next application note.

Regards,
Garrett

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