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AM3359: GMPC word length

Franz Figueroa32
Intellectual 2660 points
Part Number: AM3359

Hi E2E,

Good day!

On page 646 of SPRUH73Q, it is stated that length of the burst for GPMC can be two, four, or eight words. However, on other portion of this document it is 4-8-16 Word. Is the 2-4-8 option can be used if you will be using a 32-bit word and 4-8-16 option is for 16-bit word? And how can this be configured?

Thank you for your support.

Best Regards,

Franz

  • 0
    TI__Mastermind 29290 points

    Hi Franz,

    GPMC_CONFIG1_N register contains the following bit fields that decide the word size and burst length...

    READMULTIPLE
    Selects the read single or multiple access
    0x0: Single access
    0x1: Multiple access (burst if synchronous, page if asynchronous)

    DEVICESIZE
    Selects the device size attached
    0h (R/W) = 8 bit
    1h (R/W) = 16 bit
    2h (R/W) = Reserved
    3h (R/W) = Reserved


    ATTACHEDDEVICEPAGELENGTH
    Specifies the attached device page (burst) length
    0x0: 4 words
    0x1: 8 words
    0x2: 16 words
    0x3: Reserved (1 word = interface size)

    The ATTACHEDDEVICEPAGELENGTH bitfield states that the burst length can be 4, 8, or 16 words. However, if you send fewer words than the ATTACHEDDEVICEPAGELENGTH, the GPMC will stop the burst early. For example if DEVICESIZE is 1h (16 bit) and ATTACHEDDEVICEPAGELENGTH is 0x2 (16 words), and you write to the GPMC memory with the CPU using a 32-bit type, the 32-bits will become a burst of 2 16-bit words (not 16 words).

    Hope this helps,
    Mark

  • 0 in reply to Mark Mckeown
    TI__Intellectual 2660 points

    Hi Mark,

    Thank you for your response. This is very detailed. However, can you please further explain the meaning of 2-4-8 words option on page 646 of SPRUH73Q?

    Best regards,

    Franz

  • 0 in reply to Franz Figueroa32
    TI__Mastermind 29290 points

    Hi Franz,

    I think "2-4-8 words option" must have been printed in the TRM by mistake. (see next response)

    I went back to the GPMC spec and it only describes 4-8-16 Word bursts.

    The only mention of a 2 Word burst is relating to the 32-bit OCP port that connects the GPMC internally to the masters (CPU/DMA): "The GPMC can receive different types of transaction from the system interconnect. Through its 32bit OCP port, only power-of-two length precise bursts 2x32, 4x32, 8x32 or 16x32 with the burst base address aligned on the total burst size are supported."

    I think we should file a bug against the TRM in this case. I'll do that. (see next response)

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    TI__Mastermind 29290 points

    Sorry Franz,

    Now I see that 7.1.2.3.10.5 System Burst Versus External Device Burst Support is referring to the internal 32-bit OCP bus, which does support 2-word bursts across its 32-bits.

    Since the GPMC external bus goes up to 16-bits, the 2-word burst of 32-bit words (minimum OCP burst length) gets translated into a 4-word burst of 16-bit words at the GPMC pins.

    GPMC cannot burst with an 8-bit external bus configuration.
    Refer to 7.1.2.3.10.4 Page and Burst Support states that 8-bit wide device support is limited to nonburstable devices (READMULTIPLE and WRITEMULTIPLE are ignored).

    I will not file a bug.

    Good question!

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    TI__Intellectual 2660 points

    Hi Mark,

    Thank you for the clarification.

    So 2-4-8 word options are for 32-bit word and 4-8-16 word options are for 16-bit word configuration. Correct? One last question, how is the 32-bit word can be configured?

    Best regards,

    Franz

  • 0 in reply to Franz Figueroa32
    TI__Mastermind 29290 points

    Hi Franz,

    Almost.

    The 32-bit internal OCP bus is what connects the GPMC internally to the CPU/DMA masters. The GPMC on this device only has 16 data pins and cannot send or receive 32-bit words. It must break them up into 16-bit words. The internal OCP connection supports 2-4-8 word bursts across its 32-bit internal bus but the GPMC pins support 4-8-16 word bursts across its 16-bit interface.

    The 32-bit wide word from the OCP bus gets translated into 2 16-bit words inside the GPMC, so the 2-word burst of 32-bit OCP words translates to a 4-word burst of 16-bit GPMC words, the 4-word burst of 32-bit OCP words translates to an 8-word burst of 16-bit GPMC words, and the 8-word burst of 32-bit OCP words translates to a 16-word burst of 16-bit GPMC words.

    Future devices may support 32-bit words at the GPMC pins, but currently GPMC supports only a 16-bit external data bus.

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    TI__Intellectual 2660 points

    Hi Mark,

    I see. Thank you for the explanation.

    Best regards,

    Franz