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CCS/AM6526: Writing Firmware & Debugging Setup

Darren (FAE)
Expert 5483 points
Part Number: AM6526
Other Parts Discussed in Thread: UNIFLASH

Tool/software: Code Composer Studio

[1] Can the OSPI interface be used to upload firmware and debug for the AM65x Industrial Development Kit (IDK)?

[2] Is it possible to write firmware and debug via the OSPI interface, using the stock CCSTUDIO-SITARA and/or XDS560v2 features/scripts, without editing anything, for an implementation like below:

Target Device: Sitara AM6526 (OSPI: Customer Confidential information...if needed, contact me offline)
Debugger: Spectrum Digital XDS560v2 or Blackhawk XDS560v2
IDE: CCS

[3] Can the Spectrum Digital XDS560v2 // Blackhawk XDS560v2 be connected to a 20pin ARM-JTAG connector?
(Is there a connector or adapter that comes with these products...?)

[4] Are there any tools you know of for testing the DDR3 memory? (Any tools that will help evaluate the DDR3 implementation)
For example, editing the timing parameters, and checking the DQ and DQS timing margins before a bit error is detected...

I really need an answer ASAP, and I am sorry to push, but even if it is a partial answer that would be appreciated.

Thanks!

Regards,

Darren

Is it possible to write firmware and debug via the QSPI interface, using the stock CCSTUDIO-SITARA and/or XDS560v2 features/scripts, without editing anything?

Target Device: Sitara AM6526 (OSPI: Customer Confidential information...if needed, contact me offline)

Debugger: Spectrum Digital XDS560v2 or Blackhawk XDS560v2
IDE: CCS

  • 0
    TI__Genius 14680 points

    Darren,

    Can you clarify further on your need for Q1 & Q2? By firmware are you referring to the System Firmware (SYSFW) or are you referring to target software for the A53 and R5F cores?

    Assuming the latter, the OSPI is not a suitable interface for interactive debug. It can be used for booting the device and loading program images, either as a primary or secondary interface selection for the 1st-level boot (via on-chip ROM) or as the boot medium for the 2nd-level boot (via SBL/SPL).

    OSPI programming can be done leveraging the uniflash writer - http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_board.html#uniflash

    For Q3: See https://www.ti.com/lit/pdf/spruim6 section 3.1:

    Debug:

    •  XDS110 on-board emulator

    •  Supports 20-pin JTAG connection from external emulator

    •  Automatic selection between on-board and external emulator (higher priority)

    •  Quad port UART to USB circuit over micro BUSB connector

    •  Two UART, one SPI, and I2C ports connected to test header for slave testing of the AM65x device

    •  Four timer signals from Maxwell connected to test header

    •  Two push buttons to generate Interrupts

    Q4: Please see https://www.ti.com/tool/SITARA-DDR-CONFIG-TOOL

    Best regards,

    Dave