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Original question:

TMS320C6748: Build SPI Loopback example and modify to work in Master/Slave mode

TMS320C6748: SPI Master/Slave transfer error using PDK

FrankXu
Genius 3500 points
Part Number: TMS320C6748

In my application, the C6748 SPI1 is used as a slave, and another MCU ESP32 is used as a master. SPICLK=10MHz.

But the SPI commucation get errors sometimes, so I tried to find some examples using SPI as Slave.

Here I find the examples:

https://e2e.ti.com/support/processors/f/791/t/668158?tisearch=e2e-sitesearch&keymatch=SPI%25252525252525252520SLAVE%25252525252525252520PDK%25252525252525252520C674#pi320966=2 

I read the above post and run the Master/Slave exmaple project using two C6748 EVM boards.

The SPI signals CLK\MOSI\MISO\CS and GND are connected using wires. I'm sure the the signals are well connected.

But running the examples, the Master and Slave will get error bit at the second transfer. I changed the CLK from 10MHz to 1MHz, but still has the problem.

Does anybody run the example and get everything right?

Or does anybody use C6748 as SPI slave and work normally?

Thank you.

  • 0
    TI__Mastermind 27355 points

    Hello,

    Which version of Processor SDK are you using? And are you using the C6748 LCDK? (as opposed to the C6748 EVM)

    Some questions to help us get a better understanding of the issue:

    Do you still see incorrect data on the SIMO line if you lower the SPI clock to 200/100 kHz?

    Is the issue seen only on the second transfer or is it random? 

    Are you using DMA?

    Is this issue seen with other polarity and phase configurations? Also, please make sure the SPI polarity and phase match on both devices (you can check the SPIFMT register on the C6748).

    Is behavior different when running SPI in 3-pin mode without the CS pin?

    Regards,
    Sahin