AFE7921: Some error about Latte

zhansheng chen

Part Number: AFE7921

Hi:

We had download and install AFE79xxEVM_GUIv1p10p1_installer.exe and run Latte.

But when we run the demo python script,it was error.We was run AFE79xx_TSW14J56_Mode1.py and AFE79xx_EVM_Mode1.py , also error in other script.

When we run AFE79xx_TSW14J56_Mode1.py,the log is below

Workspace is cleared

Cannot run file

#Error: name 'sysParams' is not defined

# "AFE79xx/Automation/AFE79xx_TSW14J56_Mode1.py", line 18, in

# NameError: name 'sysParams' is not defined

#Done executing .. AFE79xx/Automation/AFE79xx_TSW14J56_Mode1.py

#End Time 2023-11-17 11:20:51.847000

#Execution Time = 0.00299978256226 s

#================ ERRORS:3, WARNINGS:0 ================#

When we run AFE79xx_EVM_Mode1.py,the log is below

#Executing .. AFE79xx/bringup/AFE79xx_EVM_Mode1.py

#Start Time 2023-11-17 11:22:39.597000

#Error: name 'setupParams' is not defined

# "AFE79xx/bringup/AFE79xx_EVM_Mode1.py", line 14, in

# NameError: name 'setupParams' is not defined

#Done executing .. AFE79xx/bringup/AFE79xx_EVM_Mode1.py

#End Time 2023-11-17 11:22:39.600000

#Execution Time = 0.00300002098083 s

#================ ERRORS:1, WARNINGS:0 ================#

We do not change any of setting.

the window of Latte is below

9 months ago

0 Kang Hsia 9 months ago

TI__Guru 69484 points

Hello

Please note that the TSW14J56 EVM is now obsoleted. You will now be able to use the TSW14J58 EVM as FPGA based EVM. To do so, please do the following:

1. install HSDC PRO software:

https://www.ti.com/tool/download/DATACONVERTERPRO-SW

2. For all setups, please start with TSW14J58 jumper J35 to be in the downward position (i.e. 1-2) for JESD204B firmware start-up. Please see below diagram

J35 = downward = JESD204B firmware

NOTE: J35 = upward = JESD204C firmware

3. Install AFE79xx Software V1.10.1 This is the latest in TI SecureServer.

AFE79xxEVM_GUIv1p10p1_installer.exe

4. Further instructions:

Connect USB Type C to J1 and USB Type B cable to J23
Connect AFE79xx EVM to TSW14J58 EVM
Connect USB Type B Cable to AFE79xx EVM
Power up the TSW14J58 + AFE79xx EVM
Run Latte
1. setup.py
2. devInitpy
3. You may edit Mode1.py in the following fashion

setupParams.skipFpga 				= 0

sysParams.syncLoopBack				= False

Complete example code:

'''
Validation :  AFE79xx Library Version 
				v1.67, v1.74
Case			RX					TX						   FB						CLK					Notes
----	-----------------	  -----------------			-----------------			-----------			------------
1		245.76Msps, 24410     491.52Msps, 44210			491.52Msps, 22210			FADC=2949.12M       DAC in interleaved mode
		SerDes=9830.4Mbps     SerDes=9830.4Mbps			SerDes=9830.4Mbps			FDAC=8847.36M
		PLL0, NCO=3500M		  PLL0, NCO=3500M			NCO=3500M                   REF=491.52M
		
2		245.76Msps, 24410     491.52Msps, 44210			491.52Msps, 22210			FADC=2949.12M       DAC in straight mode
		SerDes=9830.4Mbps     SerDes=9830.4Mbps			SerDes=9830.4Mbps			FDAC=8847.36M
		PLL0, NCO=3500M		  PLL0, NCO=3500M			NCO=3500M                   REF=491.52M
'''
setupParams.skipFpga 				= 0
sysParams							=	AFE.systemParams
setupParams.fpgaRefClk 				= 245.76	
AFE.systemStatus.loadTrims			= 1

sysParams.FRef                    	= 491.52
sysParams.FadcRx                  	= 2949.12
sysParams.FadcFb				  	= 2949.12
sysParams.Fdac                    	= 2949.12*3

sysParams.enableDacInterleavedMode	= True 					#DAC interleave mode to save power consumption. Fs/2 - Fin spur occurs

sysParams.modeTdd 					= 0		
										# 0- Single TDD Pin for all Channels
										# 1- Separate Control for 2T/2R/1F
										# 2- Separate Control for 1T/1R/1F			

sysParams.topLevelSystemMode		= 'StaticTDDMode'
sysParams.RRFMode 					= 0   #4T4R2F FDD mode
sysParams.jesdSystemMode			= [1,1]
										#SystemMode 0:	2R1F-FDD						; rx1-rx2-fb-fb
										#SystemMode 1:	1R1F-FDD						; rx1-rx1-fb-fb
										#SystemMode 2:	2R-FDD							; rx1-rx1-rx2-rx2
										#SystemMode 3:	1R								; rx1-rx1-rx1-rx1
										#SystemMode 4:	1F								; fb-fb-fb-fb
										#SystemMode 5:	1R1F-TDD						; rx1/fb-rx1/fb-rx1/fb-rx1/fb
										#SystemMode 8:	1R1F-TDD 1R-FDD	(FB-2Lanes)(RX1 RX2 interchanged)		; rx2/fb-rx2/fb-rx1-rx1


sysParams.jesdLoopbackEn			= 0 #Make it 1 to Enable the JESDTX to JESDRX internal loopback
sysParams.LMFSHdRx                	=['24410', '24410', '24410', '24410']	
										# The 2nd and 4th are valid only for jesdSystemMode values in (2,6,7,8). For other modes, select 4 converter modes for 1st and 3rd.
sysParams.LMFSHdFb                	= ["22210","22210"]
sysParams.LMFSHdTx                	= ["44210","44210","44210","44210"]
sysParams.jesdTxProtocol            = [0,0]
sysParams.jesdRxProtocol            = [0,0]
sysParams.serdesFirmware			= True 		# If you want to lead any firmware, please speify the path here. Otherwise it will not write any firmware
sysParams.jesdTxLaneMux				= [0,1,2,3,4,5,6,7]	
												# Enter which lanes you want in each location. 
												# Note that across 2T Mux is not possible in 0.5.
												# For example, if you want to exchange the first two lines of each 2T, this should be [[1,0,2,3],[5,4,6,7]]
sysParams.jesdRxLaneMux				= [0,1,2,3,4,5,6,7]	
												# Enter which lanes you want in each location.
												# Note that across 2R Mux is not possible in 0.5.
												# For example, if you want to exchange the first two lines of each 2R, this should be [[1,0,2,3],[5,4,6,7]]

sysParams.jesdRxRbd					= [4, 4]

sysParams.rxJesdTxScr				= [False,False,False,False]
sysParams.fbJesdTxScr				= [False,False]
sysParams.jesdRxScr					= [False,False,False,False]

sysParams.rxJesdTxK					= [32,32,32,32]
sysParams.fbJesdTxK					= [32,32]
sysParams.jesdRxK					= [16,16,16,16]

sysParams.ncoFreqMode 				= "1KHz"
	
sysParams.txNco0					= 	[[3500,2600],		#Band0, Band1 for TxA for NCO0
										[3500,2600],        #Band0, Band1 for TxB for NCO0
										[3500,2600],        #Band0, Band1 for TxC for NCO0
										[3500,2600]]        #Band0, Band1 for TxD for NCO0
										
#sysParams.txNco0					= 	[[800,800],		#Band0, Band1 for TxA for NCO0
#										[800,800],        #Band0, Band1 for TxB for NCO0
#										[800,800],        #Band0, Band1 for TxC for NCO0
#										[800,800]]        #Band0, Band1 for TxD for NCO0
#
sysParams.rxNco0					= 	[[3500,2600],		#Band0, Band1 for RxA for NCO0
										[3500,2600],        #Band0, Band1 for RxB for NCO0
										[3500,2600],        #Band0, Band1 for RxC for NCO0
										[3500,2600]]        #Band0, Band1 for RxD for NCO0

sysParams.fbNco0					= 	[3500,3500]			#FBA, FBC for NCO0
sysParams.fbNco1					= 	[3500,3500]			#FBA, FBC for NCO1
sysParams.fbNco2					= 	[3500,3500]			#FBA, FBC for NCO2
sysParams.fbNco3					= 	[3500,3500]			#FBA, FBC for NCO3

sysParams.numBandsRx				= [0]*4					# 0 for single, 1 for dual
sysParams.numBandsFb				= [0,0]				
sysParams.numBandsTx				= [0,0,0,0]

sysParams.ddcFactorRx             	= [12,12,12,12]			# DDC decimation factor for RX A, B, C and D
sysParams.ddcFactorFb             	= [6,6]
sysParams.ducFactorTx             	= [18,18,18,18]

AFE.systemStatus.loadTrims			=1

## The following parameters sets up the LMK04828 clocking schemes
lmkParams.pllEn						=	True#False
lmkParams.inputClk					=	1474.56#737.28
lmkParams.sysrefFreq				=	2949.12/1024
lmkParams.lmkFrefClk				=	True

## The following parameters sets up the register and macro dumps
logDumpInst.setFileName(ASTERIX_DIR+DEVICES_DIR+r"\Afe79xxPg1.txt")
logDumpInst.logFormat				= 0x0f
logDumpInst.rewriteFile				= 1
logDumpInst.rewriteFileFormat4		= 1
device.optimizeWrites				= 0
device.rawWriteLogEn				= 1

## The following parameters sets up the SYNCIN and SYNCOUT to interface with the TSW14J57
sysParams.jesdABLvdsSync			= 1
sysParams.jesdCDLvdsSync			= 1
sysParams.rxJesdTxSyncMux			= [0,0,0,0]
sysParams.fbJesdTxSyncMux			= [0,0]
sysParams.jesdRxSyncMux				= [0,0,0,0]		#[0,0,1,1]
sysParams.syncLoopBack				= False

# ## The following parameters sets up the AGC
# sysParams.agcParams[0].agcMode = 1 ##internal AGC
# sysParams.agcParams[0].gpioRstEnable = 0 ##disable GPIO based reset to AGC detector 
# sysParams.agcParams[0].atken = [0, 1, 0] ##enable big and small step attack
# sysParams.agcParams[0].decayen = [0,1,0] ##enable big and small step decay
# sysParams.agcParams[0].atksize = [2,1,0] ## bigs step = 2dB, small step = 1dB
# sysParams.agcParams[0].decaysize = [2,1,0] ##big step = 2dB, small step = 1dB
# sysParams.agcParams[0].atkthreshold = [-1, -2, -14] ##attack threshold
# sysParams.agcParams[0].decaythreshold = [-14, -6, -20] ##decay threshold
# sysParams.agcParams[0].atkwinlength = [170, 170] ## detector time constant expressed inn absolute time in ns. 
# sysParams.agcParams[0].decaywinlength = 87380 ##detector time constant expressed in absolute time in ns. All detectors use the same value for decay time constant
# sysParams.agcParams[0].atkNumHitsAbs = [8,8] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
# sysParams.agcParams[0].decayNumHitsAbs = [100,100] ##absolute number of times signal crosses threshold. These crossing are with respect to the FADC/8 clock
# sysParams.agcParams[0].minDsaAttn = 0 ##minimum DSA attenuation used by AGC
# sysParams.agcParams[0].maxDsaAttn = 22 ##maximum DSA attenuation used by AGC
# sysParams.agcParams[0].totalGainRange = 22 ##total gain range used by ALC for gain compensation
# sysParams.agcParams[0].minAttnAlc = 0 ##minimum attenuation used by ALC for compensation when useMinAttnAgc = 0
# sysParams.agcParams[0].useMinAttnAgc = 1 ##enable ALC to use minimum attenuation from AGC for which compensation is required.
# sysParams.agcParams[0].alcEn = 1
# sysParams.agcParams[0].alcMode = 0 ##floating point DGC
# sysParams.agcParams[0].fltPtMode = 0 ##if exponent > 0, dont send MSB
# sysParams.agcParams[0].fltPtFmt = 1 ##3 bit exponent


## The following parameters sets up the GPIOs
sysParams.gpioMapping={
		'H8': 'ADC_SYNC0',
		'H7': 'ADC_SYNC1',
		'N8': 'ADC_SYNC2',
		'N7': 'ADC_SYNC3',
		'H9': 'DAC_SYNC0',
		'G9': 'DAC_SYNC1',
		'N9': 'DAC_SYNC2',
		'P9': 'DAC_SYNC3',
		'P14': 'GLOBAL_PDN',
		'K14': 'FBABTDD',
		'R6': 'FBCDTDD',
		'H15': ['TXATDD','TXBTDD'],
		'V5': ['TXCTDD','TXDTDD'],
		'E7': ['RXATDD','RXBTDD'],
		'R15': ['RXCTDD','RXDTDD']}
		
#AFE.systemParams.papParams[0]['enable'] = True
#AFE.systemParams.papParams[1]['enable'] = True
#AFE.systemParams.papParams[2]['enable'] = True
#AFE.systemParams.papParams[3]['enable'] = True
		

## Initiates LMK04828 and AFE79xx Bring-up
AFE.deviceBringup()

AFE.TOP.overrideTdd(15,3,15) #rx,fb,tx

Aman Thombre is working on an new automated script, and will provide some updates once it is finalized with testing. Thank you

-Kang

+1 Aman Thombre 9 months ago in reply to Kang Hsia

TI__Expert 3020 points

Hi Zhansheng,

I have an automated script that you can use to demo the AFE7921 and TSW14J58 EVMs together. This script will send a tone at 3510 MHz using the TXA channel, and will receive and display an FFT of this tone using the RXA channel. To visualize this received tone, please ensure that you have HSDC Pro installed.

I've put some instructions on how to run this script.

On the AFE7921 EVM:

Please connect RXA and TXA, as shown in the picture below.

On the TSW14J58 EVM:

As Kang had shown in his earlier post, please make sure that the J35 jumper is in the downward position, to make sure you are using the JESD 204B firmware.

In HSDC Pro:

Please open the High Speed Data Converter Pro app. You'll see a starting screen like below, please hit cancel on the pop up dialog.

In Latte:

Please replace AFE79xx_EVM_Mode1.py with the script Kang had provided above.

In addition, you will need to add two new scripts for this automation script, I have provided both below.

Create a new script in the "bringup" folder - where bringup.py and AFE79xx_EVM_Mode1.py are located. This will create a new script called "scriptX.py," where X will be some number. Please rename this new script to fpgareset.py by double clicking on the name of this new script.

In fpgareset.py, paste the following script:

from USBHSCProgrammer import USBQPort

if("fpgaResetFtdi" not in globals()):
	qportAddr="TSW14J58_CTRL B"
	fpgaResetFtdi=USBQPort(name="FPGA reset",addr=qportAddr)
	fpgaResetFtdi.pin0=4  #fpga resetZ=1. For ver0, this is reset. Logic needs inversion. 
	fpgaResetFtdi.pin1=5
	fpgaResetFtdi.pin2=4  #program sel=1
	fpgaResetFtdi.pin3=5
	fpgaResetFtdi.pin4=4  #fpga progZ=1
	fpgaResetFtdi.pin5=5
	fpgaResetFtdi.pin6=5
	fpgaResetFtdi.pin7=5


def reloadFpga():
	if("fpgaResetFtdi" in globals()):
		log("Programing FPGA ....")
		fpgaResetFtdi.pin4=3
		delay(0.5)
		fpgaResetFtdi.pin4=4
		delay(0.2)
		log("Programing FPGA Done")
	else:
		error("FPGA Reset device not found")

def resetFpga(ver=0):
	if("fpgaResetFtdi" in globals()):
		log("Resetting FPGA ....")
		for i in range(2):
			if(ver==1):
				fpgaResetFtdi.pin0=3
				delay(0.5)
				fpgaResetFtdi.pin0=4
				delay(0.8)
			else:
				fpgaResetFtdi.pin0=4
				delay(0.5)
				fpgaResetFtdi.pin0=3
				delay(0.8)


		log("Resetting FPGA Done")
		if("myfpga" in globals()):
			myfpga.Reconnect()
	else:
		error("FPGA Reset device not found")


def changeJESDMode(ver=0):
	#204C: 0
	#204B: 1
	if("fpgaResetFtdi" in globals()):
		log("Changing FPGA Firmware From ")
		if(ver==0):
			log("204B to 204C")
			fpgaResetFtdi.pin2=3
		if(ver==1):
			log(" 204C to 204B")
			fpgaResetFtdi.pin2=4
	else:
		error("FPGA Reset device not found")

changeJESDMode(1)
reloadFpga()
resetFpga(1)

Create a new script in the "Automation" folder - where the AFE79xx_TSW14J56_Mode1.py file is located. This will again create a new file, you can choose to name this script whatever you want.

In this new file, paste the following automation script:

mainWindow.clearSession()

## Note : below base_directory needs to be modified per user's environment. 
base_directory = PROJECTS_DIR + "AFE79xx\\"

'''************INITIALIZATION**********************'''
mainWindow.runFile(base_directory + r"bringup/setup.py")
mainWindow.runFile(base_directory + r"bringup/fpgareset.py")
mainWindow.runFile(base_directory + r"bringup/devInit.py")

'''************RUN BASICBRINGUP.PY**********************'''
device.delay_time = 0 # run faster
mainWindow.runFile(base_directory + r"bringup/AFE79xx_EVM_Mode1.py")

'''************SEND TX TONE AND RECEIVE**********************'''
## Turn on RXA and TXA
AFE.TOP.overrideTdd(1,0,1) 

## Send single tone
freq=10 # offset frequency from NCO

amplA = -10
freqA = freq
amplB = -10
freqB = freq
AFE.selectCh(2,0)
AFE.FPGA.sendSingleTone(0,freqA,amplA,freqB,amplB)
AFE.adcDacSync(1)

## Capture data
AFE.selectCh(0,0) # choose RXA
AFE.adcDacSync(1)

engine.sampleNo = 2**16 # 65k samples
engine.captureType = 1
engine.inputFrequency = 3510e6
engine.start = 1 # start capture

## Save capture data

ImportCSVFilePathWithName = # replace with user path

AFE.saveCaptureData(ImportCSVFilePathWithName)

'''************VISUALIZE CAPUTRE IN HSDC PRO**********************'''
NoofBits = 16
NoofChannels = 1
TimeoutinMs = 30000

Datarate = 245.76E6
InputTargetFrequency = freq * 1E6
Number_Of_Samples_Per_Channel = 65536
NumberOfSamplesForAnalysis = 65536

PlotType = 2 #0-Codes 1-Bits 2-Real_FFT 3-Complex_FFT
plotStr = ""
if PlotType == 0:
	plotStr = "codes"
elif PlotType == 1:
	plotStr = "bits"
elif PlotType == 2:
	plotStr = "real FFT"
elif PlotType == 3:
	plotStr = "complex FFT"

info ("Setting ADC output data rate as {:.2f} MSPS.".format(Datarate/1E6))
Err_Status = HSDC_Pro.Pass_ADC_Output_Data_Rate(c_double(Datarate),TimeoutinMs)
if Err_Status:
	critical("Error setting data rate.")

info ("Setting ADC input target grquency as {:.2f} MHz.".format(InputTargetFrequency/1E6))
Err_Status = HSDC_Pro.Set_ADC_Input_Target_Frequency(c_double(InputTargetFrequency),TimeoutinMs)
if Err_Status:
	critical("Error setting target frequency.")

info ("Setting number of samples as {:d}.".format(Number_Of_Samples_Per_Channel))
Err_Status = HSDC_Pro.Set_Number_of_Samples(c_ulonglong(Number_Of_Samples_Per_Channel),TimeoutinMs)
if Err_Status:
	critical("Error setting number of samples.")

info ("Setting ADC analysis window length as {:d}.".format(NumberOfSamplesForAnalysis))
Err_Status = HSDC_Pro.ADC_Analysis_Window_Length(c_ulong(NumberOfSamplesForAnalysis),TimeoutinMs)
if Err_Status:
	critical("Error setting analysis window length.")

info ("Selecting ADC plot type as {}.".format(plotStr))
Err_Status = HSDC_Pro.ADC_Plot_Type(c_ulong(PlotType),TimeoutinMs)
if Err_Status:
	critical("Error selecting plot type.")

info ("Importing data file from {}.".format(ImportCSVFilePathWithName))
Err_Status = HSDC_Pro.ADC_Import_Data_File(ImportCSVFilePathWithName,NoofBits,NoofChannels,TimeoutinMs)
if Err_Status:
	critical("Error importing data.")

Important: In line 41 of this script, you will need to provide a path to save a CSV file, please provide some valid path on your PC. For example, on my PC, I have: ImportCSVFilePathWithName = r"C:\Users\DC-WI\Documents\capture.csv".

Now, you can press the F5 key on the automation script, and after about 2-4 minutes, the AFE should be brought up and will send and receive a tone at 3510 MHz. If all goes well, you will see this output in HSDC Pro:

And the Latte output should look like this:

Troubleshooting:

If you see the "Cannot run file" error - this probably means that the automation script I provided you isn't pointing to the correct files. You can try running each of lines 7, 8, 9, and 13 individually in the automation script to see which file is not being found. You can also type "base_directory" into the command line, to see where Latte thinks these scripts should be located. Please ensure that each of the files referred to in lines 7, 8, 9, and 13 exist and that the script is pointing to the correct directory.

If you see the "Could not connect to capture card" error, please try changing the last line in fpgareset.py to resetFpga(0) (instead of resetFpga(1)).

I hope this helps, please let me know if you need any clarification or run into any errors with this.

Thanks,

Aman

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AFE7921: Some error about Latte