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AWR1243BOOST: Application inquiry

Renan Santos Adriano
Genius 17800 points
Part Number: AWR1243BOOST
Other Parts Discussed in Thread: DCA1000EVM, AWR1243

Hello Team,

Posting on behalf of my customer:

I have AWR1243 module and DCA1000EVM module, and plan to use them for real-time transmission of radar data to FPGA development board.

I found that in the packets sent back by DCA1000EVM, a DCERPC packet will appear every 256 UDP packets, and the order of this DCERPC packet will always be in the 4th of 256 packets, and the data length of both UDP packet and DCERPC packet is 1466 bytes.

Question 1: Could you mind tell the meaning of the DCERPC packets.  Do they have a special meaning compared to UDP packets? Do they both contain 1456 bytes of Raw mode data?

Question 2: During the experiment, I also found a Pathports packet, does the Pathports packet have a special meaning relative to the UDP packet? Do they both contain 1456 bytes of Raw mode data?

Regards,

Renan

  • 0
    TI__Mastermind 19545 points

    Hi Renan,

    The DCA ethernet packet structure is described in the DCA userguide and the ADC data is strictly packetized within the UDP packets.

    • Can you please describe your experiments and how you came across these other packets?
    • Did you perhaps use a tool like Wireshark to sniff the packets?
    • Are you seeing a problem when you extract the ADC data out of these UDP packets alone? If not, there should not be any issues.


    Regards,

    Kaushik

  • 0 in reply to Kaushik Gowda
    TI__Genius 17800 points

    Hello Kaushik,

    Good day. Please see the response from my customer below:

    Firstly, as shown in Figure 1, after the FPGA development board and DCA1000EVM send 6 short packets to each other, I use mmWave Studio to control the DCA1000EVM to send packets to the FPGA development board continuously.
    Secondly, I use Wireshark to sniff the packets.
    Thirdly, I successfully extracted the ADC data in all packets in real time using the FPGA development board and did a 1D FFT, which is almost the same as the 1D FFT image provided by mmWave Studiot. The 1D FFT image implemented by the FPGA development board is shown in Figure 2, and the 1D FFT image provided by mmWave Studiot is shown in Figure 3.
    Figure(2)
    Figure(3)
    Finally, based on the experimental results, I found that the valid data formats in DCERPC packets and Pathports packets are consistent with UDP packets. It is presumed that DCERPC packets and Pathports packets are misjudged by Wireshark, and they should both be UDP packets.

    Regards,

    Renan

  • 0 in reply to Renan Santos Adriano
    TI__Mastermind 19545 points

    Hi Renan,

    Thank you for your feedback. As I said, there shouldn't be any non-UDP packets sent from the DCA1000.

    Renan Santos Adriano said:
    Finally, based on the experimental results, I found that the valid data formats in DCERPC packets and Pathports packets are consistent with UDP packets. It is presumed that DCERPC packets and Pathports packets are misjudged by Wireshark, and they should both be UDP packets.

    Based on this, can we close the thread?

    Regards,

    Kaushik