Hi,
In order to answer my technical question, I tried to run TI-PSPICE with the TMUX7212 sample schematic/simulation, but was getting errors "out of the box". I could not fix these errors (which were apparently due to paths not found), so I need to ask the knowledgeable engineer there at TI:
1) The operational diagrams on page 1 of the attached datasheet suggest that, specifically for the TMUX7212, the SW switches are "closed" (ie, conductive of around 2 ohms) when the corresponding SELx = logic 1. Correct?
2) The Pin functions definition table (ie, Table 6-1 on page 3) suggests there is a Pulldown on each SELx line. Meaning that if the SELx is left "unconnected", driven low, or "driven" by a tristate, the corresponding SW will be "open". Correct? This appears to be consistent with the 9-2 Truth Table on page 28.
3) What is the state of the SW's if the TMUX7212 is not powered (ie, VDD/VSS is set to 0 volts)? In this power-off condition, can the chip tolerate voltages applied to the switch I/O (as measured with respect to GND); Are there parasitic diodes on the I/O of the chip?
Thank You,
Joe Norris