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SN3257-Q1: SPI/I2C/Control pins isolation from the uC

Part Number: SN3257-Q1
Other Parts Discussed in Thread: ISO7041-Q1, , SN74LV125A-Q1, SN54LVTH244A-SP

Hello,
I am working on the subsystem for the CubeSat, where reliability is high importance. I am coming to You with a trateoff that I have to make.

For example, I have SPI bus between uC and FRAM chip. FRAM chip is supplied with VDD_FRAM (supplied through LCL), and uC is supplied through another LCL to get VDD.
When FRAM is not used, I want to cut off it from the SPI bus. I am thinking about two options:
a) ISO7041-Q1 use this digital isolator for the signal lines. GND is common and both power pins are connected to VDD_FRAM. It will be powered off when FRAM is not active.
b) use SN3257-Q1 switch. It will be supplied from VDD_FRAM and in default output A will be floating (disconnected from SPI bus). When powered on and SEL pin activated, it will switch to output B which will connect SPI. This model has "power-off" protection. 

Which option is more reliable in this application? Note that because it's made in CMOS technology, I need to keep these IC's turned off most of the time to avoid influence of SEE (caused by radiation).

Best regards!
Slawek

  • An isolator like the ISO7041-Q1 makes sense only for galvanic isolation.

    The SN3257-Q1 would be able to disconnect the signals. Alternatively, use any buffer with Ioff protection, e.g., SN74LV125A-Q1 or SN54LVTH244A-SP.

  • Hi Slawek,

    To add on to what Clemens said, I suggest tie the default A outputs to GND through a termination resistor (normally a 50ohm resistor). This important because possibility of noise coupling to the unused inputs and introducing crosstalk into the multiplexer which can cause fluctuations on other inputs and outputs on the device itself.

    Thanks and Regards,

    Kameron