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Original question:

PMP40500: Seeking PMP40500 case detailed design calculation book and simulation model

PMP40500: UNDER VOLTAGE LOCK OUT OF PMP40500

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Intellectual 2205 points
Part Number: PMP40500

Hi Team

Please tell me the UNDER VOLTAGE LOCK OUT OF PMP40500 

Best regards,
William

  • 0
    TI__Intellectual 965 points

    Hi, 

    The minimum input voltage is around 40Vin if just regulated output with no full load. Because the primary to secondary turn ratio is 1.5 and half bridge maximum duty cycle is around 48%. However, When 40Vin, the input RMS current of FET and transformer will be increasing. It can't support 40Vin 500W output considering FET an d transformer thermal.

    Thanks.