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Original question:

TIDA-01454: Make many CMBs, sample exactly at the same time

TIDA-01454: How to change default Sampling rate in the CMB?

Mikel Culla
Prodigy 110 points
Part Number: TIDA-01454
Other Parts Discussed in Thread: PCM1864

Hello,

It seems the CMBs are working at 96 KHz by default, can I change this with I2C configuration?

0x94 0x00 0x00 // Change to Page 0
0x94 0x01 0x40 // PGA CH1_L to 32dB
0x94 0x02 0x40 // PGA CH1_R to 32dB
0x94 0x03 0x40 // PGA CH2_L to 32dB
0x94 0x04 0x40 // PGA CH2_R to 32dB
0x94 0x05 0x86 // Enable SMOOTH PGA Change; Independent Link PGA;
0x94 0x06 0x41 // Polarity: Normal, Channel: VINL1[SE]
0x94 0x07 0x41 // Polarity: Normal, Channel: VINR1[SE]
0x94 0x08 0x44 // Polarity: Normal, Channel: VINL3[SE]
0x94 0x09 0x44 // Polarity: Normal, Channel: VINR3[SE]
0x94 0x0A 0x00 // Secondary ADC Input: No Selection
0x94 0x0B 0x44 // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format
0x94 0x10 0x03 // GPIO0_FUNC - SCK Out; GPIO0_POL - Normal
0x94 0x11 0x50 // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal
0x94 0x12 0x04 // GPIO0_DIR - GPIO0 - Output
0x94 0x13 0x40 // GPIO3_DIR – GPIO3 - Output
0x94 0x20 0x11 // MST_MODE: Master; CLKDET_EN: Disable



0x96 0x00 0x00 // Change to Page 0
0x96 0x01 0x40 // PGA CH1_L to 32dB
0x96 0x02 0x40 // PGA CH1_R to 32dB
0x96 0x03 0x40 // PGA CH2_L to 32dB
0x96 0x04 0x40 // PGA CH2_R to 32dB
0x96 0x05 0x86 // Enable SMOOTH PGA Change; Independent Link PGA;
0x96 0x06 0x41 // Polarity: Normal, Channel: VINL1[SE]
0x96 0x07 0x41 // Polarity: Normal, Channel: VINR1[SE]
0x96 0x08 0x44 // Polarity: Normal, Channel: VINL3[SE]
0x96 0x09 0x44 // Polarity: Normal, Channel: VINR3[SE]
0x96 0x0A 0x00 // Secondary ADC Input: No Selection
0x96 0x0B 0x44 // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format
0x96 0x10 0x00 // GPIO0_FUNC – GPIO0; GPIO0_POL - Normal
0x96 0x11 0x50 // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal
0x96 0x12 0x00 // GPIO0_DIR - GPIO0 - Input
0x96 0x13 0x40 // GPIO3_DIR – GPIO3 - Output
0x96 0x20 0x01 // MST_MODE: Slave; CLKDET_EN: Enable

What do I need to change in here in order to get a 44 kHz?

Thanks in Advance

  • 0
    TI__Mastermind 26275 points

    Hi Mikel,

    You would need to refer to the PCM1864 datasheet in order to configure each device. In slave mode you would not need any register configuration, just feed the 44kHz clock. In master mode PLL configuration will be needed which you can find on Tables 9 and 10. If CLKDET_EN is high, this should happen automatically. However the tables will show you how to do it manually if needed. Note that the ratios for the 48kHz sampling are the same as for 44.1kHz. Section 9.3.9.4.2 gives more information on the clocking tree. 

    Best regards,

    Jeff