This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software: WEBENCH® Design Tools
Hi,
In LM5118 load transient, the transient could not be simulated due to limitation in simulation time. In the plot shown below, simulation ended before the step up (rise) of load current.
Initial delay time was given as 8ms since the output voltage takes more time to settle as seen in the response plot above.
Request your help to increase the simulation time.
The public shared file of the design is
https://webench.ti.com/appinfo/webench/scripts/SDP.cgi?ID=45726C870AF4EBBA
Vignesh
Hello Nikhil,
Thanks for your suggestion.
But I want to simulate the design within webench as much as possible. So I tried editing the schematic which gives more freedom to modify simulation time.
The simulation failed due to error shown in the image below.
Though it shows startup, I modified the schematic for load transient.
The public shared design is
https://webench.ti.com/appinfo/webench/scripts/SDP.cgi?ID=9830F2CA0CBA1732
Do you have any suggestion to overcome this?
Thanks and Regards
Vignesh