Hi
We design hardware using stm32f7x and cc2564c on normal mode (not assisted) base on TI cc2564c datasheet (REVISED JUNE 2020)
A2DP work correctly but we have problem with HFP (shift and corrupted frame).
cc2564c HCI SCO Tx capture:
SCO Header, mSBC Sync Word, H2 Seq Number, Bad Padding, Good Padding
03 01 01 3C DD B6 E3 77 6D B9 5D DB 6E 67 76 DB A1 DD B6 E9 77 6D BA 9D DB 6E 96 76 DB 9E DC C6 CE 4B C0 34 16 30 C0 00 01 F8 AD 00 00 AC B6 65 56 86 2C 74 E2 8D A9 16 84 29 AB 59 3B 6A E0 5A
03 01 01 3C DA B6 99 B6 AD C7 2D AB 75 FB 6A DD 8A DA B7 65 B6 AD DA 2D AB 76 BB 6A DD BA DA B7 71 B6 AD DD 0D AB 74 00 01 08 AD 00 00 D8 CA A8 88 86 A9 DD B6 E9 67 6D B9 ED CC 6C E4 BC 03 41
03 01 01 3C 63 0C 15 77 6E 15 9D DB 71 87 76 DA 65 DD B7 1A 77 6D B7 1D DB 6D D7 76 DB 7D DD B6 E0 77 6D B8 9D DB 6C 00 01 38 AD 00 00 D8 CA A8 88 86 8D DD B6 E5 77 6D B9 9D DB 6E 87 76 DB A5
03 01 01 3C 99 B6 AD C7 2D AB 75 FB 6A DD 8A DA B7 65 B6 AD DA 2D AB 76 BB 6A DD BA DA B7 71 B6 AD DD 0D AB 74 00 6C 00 01 C8 AD 00 00 FF CA A8 88 85 71 DD B6 DD 77 6D B7 DD DB 6E 07 76 DB 89
03 01 01 3C EA 77 6D BA 59 DB 6E 7B 73 1B 39 2F 00 D0 58 C3 05 5D DB 85 67 76 DC 61 DD B6 99 77 6D C6 9D DB 6C 00 C0 00 01 F8 AD 00 00 AC B6 65 56 86 2C 74 E2 8D A9 16 84 29 AB 59 3B 6A E0 5A
03 01 01 3C E3 77 6D B9 5D DB 6E 67 76 DB A1 DD B6 E9 77 6D BA 9D DB 6E 96 76 DB 9E DC C6 CE 4B C0 34 16 30 C0 00 74 00 01 38 AD 00 00 D8 CA A8 88 86 8D DD B6 E5 77 6D B9 9D DB 6E 87 76 DB A5
03 01 01 3C 99 B6 AD C7 2D AB 75 FB 6A DD 8A DA B7 65 B6 AD DA 2D AB 76 BB 6A DD BA DA B7 71 B6 AD DD 0D AB 74 00 6C 00 01 C8 AD 00 00 FF CA A8 88 85 71 DD B6 DD 77 6D B7 DD DB 6E 07 76 DB 89
after search on TI E2E, we see many non-official reply from TI employees that "eSCO over HCI is not stable in CC256x or WL18xx":
and ...
my question is clear, cc2564c support SCO/eSCO over HCI according to datasheet?
we need to work on "config" or "change patch" or "RF" or "change BT stack"?
(our design is the "cost sensitive" and we haven't unused pin)
thanks for your time!
