Other Parts Discussed in Thread: CC110L, CC1000, , CC1101
Hello,
we have developed a wireless ecosystem composed by a Base Station and Mobile Devices.
The Base Station is using the CC110L transceiver, while the Mobile Devices were developed a long time ago and still use the CC1000.
Due to the difficulties in getting the CC110L we were forced to upgrade the Base Station with the CC1200 transceiver.
The radio data protocol, used between the Base Station and the Mobile Devices is quite simple, it uses fixed size packet and no Hardware CRC but unfortunately uses Manchester. We cannot change it as it is used by the Mobile Devices already deployed on the field.
We were able to successfully receive packets on the CC1200 from the CC1000 after following the instructions on Chapter 5.2 of the CC120x User’s Guide.
However, we have been unable to correctly receive packets from the CC1200 either on the CC1000 or CC110L. Consider that the CC110L as receiver is only used for debugging purposes since it can be managed from SmartRF Studio. For the CC110L in particular, we are receiving only 40% to 60% of the packets.
Please find in attachment the configuration used for the CC110L that allows for a correct TX/RX with CC1000, and the configuration of the CC1200 that only allows for a correct RX.
// Address Config = No address check // Bit Rate = 19.2 // Carrier Frequency = 868.705933 // Deviation = 32.958984 // Device Address = 0 // Manchester Enable = true // Modulation Format = 2-FSK // Packet Bit Length = 0 // Packet Length = 25 // Packet Length Mode = Fixed // RX Filter BW = 104.166667 // Symbol rate = 38.4 // Whitening = false // // Rf settings for CC1200 // void cc120X_setup_registers(spi_write_reg_fn write_reg) { write_reg(CC120X_IOCFG2, 0x06); // GPIO2 IO Pin Configuration write_reg(CC120X_IOCFG0, 0x3C); // GPIO0 IO Pin Configuration write_reg(CC120X_SYNC3, 0xXX); // Sync Word Configuration [31:24] write_reg(CC120X_SYNC2, 0xXX); // Sync Word Configuration [23:16] write_reg(CC120X_SYNC1, 0xXX); // Sync Word Configuration [15:8] write_reg(CC120X_SYNC0, 0xXX); // Sync Word Configuration [7:0] write_reg(CC120X_SYNC_CFG1, 0xAB); // Sync Word Detection Configuration Reg. 1 write_reg(CC120X_SYNC_CFG0, 0x03); // Sync Word Detection Configuration Reg. 0 write_reg(CC120X_DEVIATION_M, 0xB0); // Frequency Deviation Configuration write_reg(CC120X_MODCFG_DEV_E, 0x03); // Modulation Format and Frequency Deviation Configur.. write_reg(CC120X_PREAMBLE_CFG1, 0x1A); // Preamble Length Configuration Reg. 1 write_reg(CC120X_PREAMBLE_CFG0, 0x8A); // Preamble Detection Configuration Reg. 0 write_reg(CC120X_IQIC, 0xC8); // Digital Image Channel Compensation Configuration write_reg(CC120X_CHAN_BW, 0x10); // Channel Filter Configuration write_reg(CC120X_MDMCFG1, 0x62); // General Modem Parameter Configuration Reg. 1 write_reg(CC120X_MDMCFG0, 0x05); // General Modem Parameter Configuration Reg. 0 write_reg(CC120X_SYMBOL_RATE2, 0x8F); // Symbol Rate Configuration Exponent and Mantissa [1.. write_reg(CC120X_SYMBOL_RATE1, 0x75); // Symbol Rate Configuration Mantissa [15:8] write_reg(CC120X_SYMBOL_RATE0, 0x10); // Symbol Rate Configuration Mantissa [7:0] write_reg(CC120X_AGC_REF, 0x27); // AGC Reference Level Configuration write_reg(CC120X_AGC_CS_THR, 0xEE); // Carrier Sense Threshold Configuration write_reg(CC120X_AGC_GAIN_ADJUST, 0x00); // RSSI Offset Configuration write_reg(CC120X_AGC_CFG3, 0xB1); // Automatic Gain Control Configuration Reg. 3 write_reg(CC120X_AGC_CFG2, 0x20); // Automatic Gain Control Configuration Reg. 2 write_reg(CC120X_AGC_CFG1, 0x11); // Automatic Gain Control Configuration Reg. 1 write_reg(CC120X_AGC_CFG0, 0x94); // Automatic Gain Control Configuration Reg. 0 write_reg(CC120X_FIFO_CFG, 0x00); // FIFO Configuration write_reg(CC120X_SETTLING_CFG, 0x0B); // Frequency Synthesizer Calibration and Settling Con.. write_reg(CC120X_FS_CFG, 0x12); // Frequency Synthesizer Configuration write_reg(CC120X_WOR_CFG0, 0x21); // eWOR Configuration Reg. 0 write_reg(CC120X_WOR_EVENT0_LSB, 0x00); // Event 0 Configuration LSB write_reg(CC120X_PKT_CFG2, 0x00); // Packet Configuration Reg. 2 write_reg(CC120X_PKT_CFG1, 0x00); // Packet Configuration Reg. 1 write_reg(CC120X_PKT_CFG0, 0x00); // Packet Configuration Reg. 0 write_reg(CC120X_RFEND_CFG1, 0x0F); // RFEND Configuration Reg. 1 write_reg(CC120X_RFEND_CFG0, 0x00); // RFEND Configuration Reg. 0 write_reg(CC120X_PA_CFG1, 0x3F); // Power Amplifier Configuration Reg. 1 write_reg(CC120X_PA_CFG0, 0x56); // Power Amplifier Configuration Reg. 0 write_reg(CC120X_PKT_LEN, 0x19); // Packet Length Configuration write_reg(CC120X_IF_MIX_CFG, 0x1C); // IF Mix Configuration write_reg(CC120X_FREQOFF_CFG, 0x22); // Frequency Offset Correction Configuration write_reg(CC120X_TOC_CFG, 0x03); // Timing Offset Correction Configuration write_reg(CC120X_MDMCFG2, 0x08); // General Modem Parameter Configuration Reg. 2 write_reg(CC120X_FREQ2, 0x56); // Frequency Configuration [23:16] write_reg(CC120X_FREQ1, 0xDE); // Frequency Configuration [15:8] write_reg(CC120X_FREQ0, 0xDF); // Frequency Configuration [7:0] write_reg(CC120X_IF_ADC1, 0xEE); // Analog to Digital Converter Configuration Reg. 1 write_reg(CC120X_IF_ADC0, 0x10); // Analog to Digital Converter Configuration Reg. 0 write_reg(CC120X_FS_DIG1, 0x04); // Frequency Synthesizer Digital Reg. 1 write_reg(CC120X_FS_DIG0, 0x50); // Frequency Synthesizer Digital Reg. 0 write_reg(CC120X_FS_CAL1, 0x40); // Frequency Synthesizer Calibration Reg. 1 write_reg(CC120X_FS_CAL0, 0x0E); // Frequency Synthesizer Calibration Reg. 0 write_reg(CC120X_FS_DIVTWO, 0x03); // Frequency Synthesizer Divide by 2 write_reg(CC120X_FS_DSM0, 0x33); // FS Digital Synthesizer Module Configuration Reg. 0 write_reg(CC120X_FS_DVC0, 0x0F); // Frequency Synthesizer Divider Chain Configuration .. write_reg(CC120X_FS_PFD, 0x00); // Frequency Synthesizer Phase Frequency Detector Con.. write_reg(CC120X_FS_PRE, 0x6E); // Frequency Synthesizer Prescaler Configuration write_reg(CC120X_FS_REG_DIV_CML, 0x1C); // Frequency Synthesizer Divider Regulator Configurat.. write_reg(CC120X_FS_SPARE, 0xAC); // Frequency Synthesizer Spare write_reg(CC120X_FS_VCO0, 0xB5); // FS Voltage Controlled Oscillator Configuration Reg.. write_reg(CC120X_IFAMP, 0x09); // Intermediate Frequency Amplifier Configuration write_reg(CC120X_XOSC5, 0x0E); // Crystal Oscillator Configuration Reg. 5 write_reg(CC120X_XOSC1, 0x03); // Crystal Oscillator Configuration Reg. 1 }
// Address Config = No address check // Base Frequency = 868.705688 // CRC Autoflush = false // CRC Enable = false // Carrier Frequency = 868.705688 // Channel Spacing = 64.064026 // Data Format = Normal mode // Data Rate = 38.4178 // Deviation = 32.958984 // Device Address = 0 // Manchester Enable = true // Modulated = true // Modulation Format = 2-FSK // Packet Length = 25 // Packet Length Mode = Fixed packet length mode. Length configured in PKTLEN register // Preamble Count = 4 // RX Filter BW = 105.468750 // Sync Word Qualifier Mode = 16/16 sync word bits detected // TX Power = 0 // // Rf settings for CC110L // void cc110L_setup_registers(spi_write_reg_fn write_reg) { write_reg(CC110L_IOCFG2, 0x29); // GDO2 Output Pin Configuration write_reg(CC110L_IOCFG1, 0x2E); // GDO1 Output Pin Configuration write_reg(CC110L_IOCFG0, 0x06); // GDO0 Output Pin Configuration write_reg(CC110L_FIFOTHR, 0x47); // RX FIFO and TX FIFO Thresholds write_reg(CC110L_SYNC1, 0x34); // Sync Word, High Byte write_reg(CC110L_SYNC0, 0xAF); // Sync Word, Low Byte write_reg(CC110L_PKTLEN, 0x19); // Packet Length write_reg(CC110L_PKTCTRL1, 0x00); // Packet Automation Control write_reg(CC110L_PKTCTRL0, 0x00); // Packet Automation Control write_reg(CC110L_ADDR, 0x00); // Device Address write_reg(CC110L_CHANNR, 0x00); // Channel number write_reg(CC110L_FSCTRL1, 0x08); // Frequency Synthesizer Control write_reg(CC110L_FSCTRL0, 0x00); // Frequency Synthesizer Control write_reg(CC110L_FREQ2, 0x20); // Frequency Control Word, High Byte write_reg(CC110L_FREQ1, 0x2C); // Frequency Control Word, Middle Byte write_reg(CC110L_FREQ0, 0x9E); // Frequency Control Word, Low Byte write_reg(CC110L_MDMCFG4, 0xCA); // Modem Configuration write_reg(CC110L_MDMCFG3, 0x75); // Modem Configuration write_reg(CC110L_MDMCFG2, 0x0A); // Modem Configuration write_reg(CC110L_MDMCFG1, 0x21); // Modem Configuration write_reg(CC110L_MDMCFG0, 0x37); // Modem Configuration write_reg(CC110L_DEVIATN, 0x42); // Modem Deviation Setting write_reg(CC110L_MCSM2, 0x07); // Main Radio Control State Machine Configuration write_reg(CC110L_MCSM1, 0x30); // Main Radio Control State Machine Configuration write_reg(CC110L_MCSM0, 0x18); // Main Radio Control State Machine Configuration write_reg(CC110L_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration write_reg(CC110L_BSCFG, 0x1C); // Bit Synchronization Configuration write_reg(CC110L_AGCCTRL2, 0xC7); // AGC Control write_reg(CC110L_AGCCTRL1, 0x00); // AGC Control write_reg(CC110L_AGCCTRL0, 0xB2); // AGC Control write_reg(CC110L_RESERVED_0X20, 0xFB); // Use setting from SmartRF Studio write_reg(CC110L_FREND1, 0xB6); // Front End RX Configuration write_reg(CC110L_FREND0, 0x10); // Front End TX Configuration write_reg(CC110L_FSCAL3, 0xE9); // Frequency Synthesizer Calibration write_reg(CC110L_FSCAL2, 0x2A); // Frequency Synthesizer Calibration write_reg(CC110L_FSCAL1, 0x00); // Frequency Synthesizer Calibration write_reg(CC110L_FSCAL0, 0x1F); // Frequency Synthesizer Calibration write_reg(CC110L_RESERVED_0X29, 0x59); // Use setting from SmartRF Studio write_reg(CC110L_RESERVED_0X2A, 0x7F); // Use setting from SmartRF Studio write_reg(CC110L_RESERVED_0X2B, 0x3F); // Use setting from SmartRF Studio write_reg(CC110L_TEST2, 0x81); // Various Test Settings write_reg(CC110L_TEST1, 0x35); // Various Test Settings write_reg(CC110L_TEST0, 0x09); // Various Test Settings write_reg(CC110L_PARTNUM, 0x00); // Chip ID write_reg(CC110L_VERSION, 0x17); // Chip ID write_reg(CC110L_FREQEST, 0x00); // Frequency Offset Estimate from Demodulator write_reg(CC110L_CRC_REG, 0x00); // write_reg(CC110L_RSSI, 0x80); // Received Signal Strength Indication write_reg(CC110L_MARCSTATE, 0x01); // Main Radio Control State Machine State write_reg(CC110L_PKTSTATUS, 0x00); // Current GDOx Status and Packet Status write_reg(CC110L_TXBYTES, 0x00); // Underflow and Number of Bytes write_reg(CC110L_RXBYTES, 0x00); // Overflow and Number of Bytes }
Could you please support us to solve the communication issues?
Thank you very much.