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CC1354P10: MCUBOOT_DIRECT_XIP mode seems not work to download same FW in 2 slots

Part Number: CC1354P10

Hello,

I tried MCUboot example and default is XIP mode.

For mcuboot_blinky example, I have to build 2 FW with different icf base address according to slot offset.

However, we prefer one FW for both slots. In my view, there should be a mapping function implemented by HW to support this.

Please help to confirm if TI support this feature?

primary slot:

/*define symbol __intvec_start__ = 0x8080;  
define symbol FLASH_start__ = 0x8080;
define symbol FLASH_end__ = 0x0002ff7f;
define exported symbol MCUBOOT_HDR_BASE = 0x8000;*/

secondary slot:
define symbol __intvec_start__ = 0x3a080;
define symbol FLASH_start__ = 0x3a080;
define symbol FLASH_end__ = 0x0002ff7f;
define exported symbol MCUBOOT_HDR_BASE = 0x3a000;

  • Hi Yao,

    This is expected behavior. mcuboot will always execute the image with the highest version number.

    Regards,

    Arthur

  • Hi Arthur,

    My question is that 2 slots are not equal and even for same firmware, need to be built according to slot base address.

    We don't want to manage firmware with slot information inside.

    Another question is  do you support  this mode MCUBOOT_SWAP_USING_SCRATCH?

    Thanks

    Yao

  • Hi Yao,

    You are correct, you have to run img tool over the image, and thoses have to have the correct slot base address.

    We do not support MCUBOOT_SWAP_USING_SCRATCH unfortunately.

    Regards,

    Arthur

  • Hi Arthur,

    What's tha gap for MCUBOOT_SWAP_USING_SCRATCH? This seems to be more MCUboot feature and just require memory mapping for scratch area.

    Do you have plan for that?

    Thanks

    Yao

  • Hi Yao,

    SWAP requires an extra sector to perform the swap, and this can wear out the flash.
    I have asked the team on whether we plan to support it or not.

    Regards,

    Arthur

  • Hi Arthur,

    Please help check below flash adaption code for mcuboot.It seems wrong for sector size(2048).

    It should be flash programming min size. For internal flash, we can write maybe 1 byte length at a time I guess.

    flash_map_backend.c

    /*< Returns this `flash_area`s alignment */
    size_t flash_area_align(const struct flash_area *fa)
    {
    int ret = -1;
    if (fa->fa_device_id == FLASH_DEVICE_INTERNAL_FLASH)
    {
    ret = 4;//FlashSectorSizeGet();                      //!!!!!!!!!!!!!!maybe wrong for 2048, change to 4 for test!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    }
    #ifdef TI_BOOT_USE_EXTERNAL_FLASH
    if (fa->fa_device_id == FLASH_DEVICE_EXTERNAL_FLASH(0))
    {
    ret = EXT_FLASH_PAGE_SIZE;
    }
    #endif /* TI_BOOT_USE_EXTERNAL_FLASH */
    else
    {
    /* incorrect/non-existing flash device id */
    ret = -1;
    }
    return ret;
    }

  • Hi Arthur,

    Any update on this?