CC1352R: CC1352R OOK modulation
Part Number: CC1352R
I would like to continue already closed thread- https://https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz/f/156/t/576254?CC1310-OOK-mode-at-20-kbps
In ti topic: https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz/f/156/t/576254?CC1310-OOK-mode-at-20-kbps
The settings are for CC1310R and only the settings for bit rate are changed.
To use CC1352R for transmission of a OOK modulation on 433MHz with bit rate 19.2kbit/s , is this mean, that I should use RF setting from Smart RF Studio 7, which are for CC13510.
There is no section to enable ASK, when the CC1352R is used.
SmartRF Studio has settings for 4.8 kbps OOK also for CC1352R which you can use as a starting point.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to TER:
May be Ver. 2.19.00, I use 2.15.00
In reply to Ilian Chakarov:
We are still adding new phys for the CC13x2 family in every version of SmartRF Studio, hence checking for updates every quarter is recommended.
I understооd, that the register, which should be changed HW_REG_OVERRIDE( , ), are part of a modem section of the RF transceiver and are not listed in any document.
According to the post, for CC1310, they are:
HW_REG_OVERRIDE(0x52B8,0x8078) and HW_REG_OVERRIDE(0x6098,0x7200).
How to understand for CC1352R, what are the addresses of the registers and bits, which should be changed to change the bit rate from 4.8kbits/s to 19.2kbit/s?
I haven't had the time to look up if the address is the same or not, it's on my todo list
can you please, also to describe the bit meaning, to have a possibility to calculate the bit rate?
The bit rate in it self is set by CMD_PROP_RADIO_DIV_SETUP.rateWord but the PA ramping has to be set according to the bitrate. The PA has to use some time to ramp up to or down from a logic '1' to avoid spectral spattering but if it's too long it will not have time to reach a logic '0' state before it has to start ramping up. Some trial and error may be required to set these, looking at the output in the time domain with a spectrum is recommneded.
Two different overrides sets the PA ramping:
// OOK: Set duty cycle to compensate for PA ramping
// Tx: Configure PA ramping, set wait time before turning off (0x1A ticks of 16/24 us = 17.3 us).
RFECMDPAR1 is the bit field described.
I will start with;
HW_REG_OVERRIDE(0x6028,0x001A) - The default value.
When I export a code, there is a message to change CCFG_FORCE_VDDR_HH = 0. in ccfg.f file. Because the output power is set +12dBm. Is this change is a must for a test purposes?
What is the correct way to change ccfg.c file?
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.